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| author |   Arnd Bergmann <arnd@arndb.de> | 2014-05-23 18:11:01 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-05-23 18:11:01 +0200 |
| commit | 85aea469ef65091ddcfadb848af1ef7ef1d9cedd (patch) | |
| tree | 110a0ceb0797f756b3ff35d82deb2e6b53376bd0 /arch | |
| parent | Merge tag 'omap-for-v3.15/fixes-v3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes (diff) | |
| parent | Merge branch 'mvebu/dt-fixes' into mvebu/fixes (diff) | |
| download | linux-dev-85aea469ef65091ddcfadb848af1ef7ef1d9cedd.tar.xz linux-dev-85aea469ef65091ddcfadb848af1ef7ef1d9cedd.zip | |
Merge tag 'mvebu-fixes-3.15-2' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for v3.15 (incremental #2)
- Armada 38x
- fix PCIe dt nodes for handling more interfaces
- mvebu
- mvebu-soc-id: fix clock handling and PCIe interface disabling.
* tag 'mvebu-fixes-3.15-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: fix definitions of PCIe interfaces on Armada 38x
ARM: mvebu: mvebu-soc-id: keep clock enabled if PCIe unit is enabled
ARM: mvebu: mvebu-soc-id: add missing clk_put() call
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/armada-380.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/armada-385.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/mvebu-soc-id.c | 13 |
3 files changed, 15 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi index 068031f0f263..6d0f03c98ee9 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -99,7 +99,7 @@ pcie@3,0 { device_type = "pci"; assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; - reg = <0x1000 0 0 0 0>; + reg = <0x1800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi index e2919f02e1d4..da801964a257 100644 --- a/arch/arm/boot/dts/armada-385.dtsi +++ b/arch/arm/boot/dts/armada-385.dtsi @@ -110,7 +110,7 @@ pcie@3,0 { device_type = "pci"; assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; - reg = <0x1000 0 0 0 0>; + reg = <0x1800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; @@ -131,7 +131,7 @@ pcie@4,0 { device_type = "pci"; assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; - reg = <0x1000 0 0 0 0>; + reg = <0x2000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c index f3d4cf53f746..09520e19b78e 100644 --- a/arch/arm/mach-mvebu/mvebu-soc-id.c +++ b/arch/arm/mach-mvebu/mvebu-soc-id.c @@ -108,7 +108,18 @@ static int __init mvebu_soc_id_init(void) iounmap(pci_base); res_ioremap: - clk_disable_unprepare(clk); + /* + * If the PCIe unit is actually enabled and we have PCI + * support in the kernel, we intentionally do not release the + * reference to the clock. We want to keep it running since + * the bootloader does some PCIe link configuration that the + * kernel is for now unable to do, and gating the clock would + * make us loose this precious configuration. + */ + if (!of_device_is_available(child) || !IS_ENABLED(CONFIG_PCI_MVEBU)) { + clk_disable_unprepare(clk); + clk_put(clk); + } clk_err: of_node_put(child); |