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| author |   Ard Biesheuvel <ardb@kernel.org> | 2020-04-09 15:04:30 +0200 |
|---|---|---|
| committer |   Ingo Molnar <mingo@kernel.org> | 2020-04-14 08:32:14 +0200 |
| commit | a94691680bace7e1404e4f235badb74e30467e86 (patch) | |
| tree | 349cc33f1ac553ff4ecbd49fce8f719c6ee91c2a /arch | |
| parent | efi/x86: Always relocate the kernel for EFI handover entry (diff) | |
| download | linux-dev-a94691680bace7e1404e4f235badb74e30467e86.tar.xz linux-dev-a94691680bace7e1404e4f235badb74e30467e86.zip | |
efi/arm: Deal with ADR going out of range in efi_enter_kernel()
Commit
0698fac4ac2a ("efi/arm: Clean EFI stub exit code from cache instead of avoiding it")
introduced a PC-relative reference to 'call_cache_fn' into
efi_enter_kernel(), which lives way at the end of head.S. In some cases,
the ARM version of the ADR instruction does not have sufficient range,
resulting in a build error:
arch/arm/boot/compressed/head.S:1453: Error: invalid constant (fffffffffffffbe4) after fixup
ARM defines an alternative with a wider range, called ADRL, but this does
not exist for Thumb-2. At the same time, the ADR instruction in Thumb-2
has a wider range, and so it does not suffer from the same issue.
So let's switch to ADRL for ARM builds, and keep the ADR for Thumb-2 builds.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200409130434.6736-6-ardb@kernel.org
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/compressed/head.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index cabdd8f4a248..e8e1c866e413 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -1450,7 +1450,8 @@ ENTRY(efi_enter_kernel) @ running beyond the PoU, and so calling cache_off below from @ inside the PE/COFF loader allocated region is unsafe unless @ we explicitly clean it to the PoC. - adr r0, call_cache_fn @ region of code we will + ARM( adrl r0, call_cache_fn ) + THUMB( adr r0, call_cache_fn ) @ region of code we will adr r1, 0f @ run with MMU off bl cache_clean_flush bl cache_off |