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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2015-12-01 09:06:57 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2015-12-14 15:19:16 +1100
commitcc50380db32771af61201cff39da1043b90f2a6d (patch)
treefd44be195dc7e725ba17c1a47bc73c6caaff78e3 /arch
parentpowerpc/mm: Don't hardcode the hash pte slot shift (diff)
downloadlinux-dev-cc50380db32771af61201cff39da1043b90f2a6d.tar.xz
linux-dev-cc50380db32771af61201cff39da1043b90f2a6d.zip
powerpc/nohash: Update 64K nohash config to have 32 pte fragement
They don't need to track 4k subpage slot details and hence don't need second half of pgtable_t. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/nohash/64/pgtable-64k.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h
index 2217de6454d6..570fb30be21c 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h
@@ -10,14 +10,14 @@
#define PGD_INDEX_SIZE 12
/*
- * we support 16 fragments per PTE page of 64K size.
+ * we support 32 fragments per PTE page of 64K size
*/
-#define PTE_FRAG_NR 16
+#define PTE_FRAG_NR 32
/*
* We use a 2K PTE page fragment and another 2K for storing
* real_pte_t hash index
*/
-#define PTE_FRAG_SIZE_SHIFT 12
+#define PTE_FRAG_SIZE_SHIFT 11
#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
#ifndef __ASSEMBLY__