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| author |   Helge Deller <deller@gmx.de> | 2021-09-08 23:27:00 +0200 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2021-09-09 12:44:31 +0200 |
| commit | d97180ad68bdb7ee10f327205a649bc2f558741d (patch) | |
| tree | 480fd5e30c16f5206d5d84caba31ae43d35de1af /arch | |
| parent | parisc: Move pci_dev_is_behind_card_dino to where it is used (diff) | |
| download | linux-dev-d97180ad68bdb7ee10f327205a649bc2f558741d.tar.xz linux-dev-d97180ad68bdb7ee10f327205a649bc2f558741d.zip | |
parisc: Mark sched_clock unstable only if clocks are not syncronized
We check at runtime if the cr16 clocks are stable across CPUs. Only mark
the sched_clock unstable by calling clear_sched_clock_stable() if we
know that we run on a system which isn't syncronized across CPUs.
Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/parisc/kernel/setup.c | 2 | ||||
| -rw-r--r-- | arch/parisc/kernel/time.c | 7 |
2 files changed, 3 insertions, 6 deletions
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c index 3fb86ee507dd..cceb09855e03 100644 --- a/arch/parisc/kernel/setup.c +++ b/arch/parisc/kernel/setup.c @@ -150,8 +150,6 @@ void __init setup_arch(char **cmdline_p) #ifdef CONFIG_PA11 dma_ops_init(); #endif - - clear_sched_clock_stable(); } /* diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c index 08e4d480abe1..9fb1e794831b 100644 --- a/arch/parisc/kernel/time.c +++ b/arch/parisc/kernel/time.c @@ -265,6 +265,9 @@ static int __init init_cr16_clocksource(void) (cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc)) continue; + /* mark sched_clock unstable */ + clear_sched_clock_stable(); + clocksource_cr16.name = "cr16_unstable"; clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE; clocksource_cr16.rating = 0; @@ -272,10 +275,6 @@ static int __init init_cr16_clocksource(void) } } - /* XXX: We may want to mark sched_clock stable here if cr16 clocks are - * in sync: - * (clocksource_cr16.flags == CLOCK_SOURCE_IS_CONTINUOUS) */ - /* register at clocksource framework */ clocksource_register_hz(&clocksource_cr16, 100 * PAGE0->mem_10msec); |