diff options
| author |   Zhang Rui <rui.zhang@intel.com> | 2021-02-05 00:18:14 +0800 |
|---|---|---|
| committer |   Peter Zijlstra <peterz@infradead.org> | 2021-02-10 14:44:54 +0100 |
| commit | ffb20c2e52e8709b5fc9951e8863e31efb1f2cba (patch) | |
| tree | 8da4a35fc2d46bfe819dabd2688b39b90caeff48 /arch | |
| parent | perf/x86/kvm: Add Cascade Lake Xeon steppings to isolation_ucodes[] (diff) | |
| download | linux-dev-ffb20c2e52e8709b5fc9951e8863e31efb1f2cba.tar.xz linux-dev-ffb20c2e52e8709b5fc9951e8863e31efb1f2cba.zip | |
perf/x86/rapl: Add msr mask support
In some cases, when probing a perf MSR, we're probing certain bits of the
MSR instead of the whole register, thus only these bits should be checked.
For example, for RAPL ENERGY_STATUS MSR, only the lower 32 bits represents
the energy counter, and the higher 32bits are reserved.
Introduce a new mask field in struct perf_msr to allow probing certain
bits of a MSR.
This change is transparent to the current perf_msr_probe() users.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/20210204161816.12649-1-rui.zhang@intel.com
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/events/probe.c | 7 | ||||
| -rw-r--r-- | arch/x86/events/probe.h | 7 |
2 files changed, 10 insertions, 4 deletions
diff --git a/arch/x86/events/probe.c b/arch/x86/events/probe.c index 136a1e847254..600bf8d15c0c 100644 --- a/arch/x86/events/probe.c +++ b/arch/x86/events/probe.c @@ -28,6 +28,7 @@ perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data) for (bit = 0; bit < cnt; bit++) { if (!msr[bit].no_check) { struct attribute_group *grp = msr[bit].grp; + u64 mask; /* skip entry with no group */ if (!grp) @@ -44,8 +45,12 @@ perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data) /* Virt sucks; you cannot tell if a R/O MSR is present :/ */ if (rdmsrl_safe(msr[bit].msr, &val)) continue; + + mask = msr[bit].mask; + if (!mask) + mask = ~0ULL; /* Disable zero counters if requested. */ - if (!zero && !val) + if (!zero && !(val & mask)) continue; grp->is_visible = NULL; diff --git a/arch/x86/events/probe.h b/arch/x86/events/probe.h index 4c8e0afc5fb5..261b9bda24e3 100644 --- a/arch/x86/events/probe.h +++ b/arch/x86/events/probe.h @@ -4,10 +4,11 @@ #include <linux/sysfs.h> struct perf_msr { - u64 msr; - struct attribute_group *grp; + u64 msr; + struct attribute_group *grp; bool (*test)(int idx, void *data); - bool no_check; + bool no_check; + u64 mask; }; unsigned long |