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| author |   Dan Williams <dan.j.williams@intel.com> | 2022-10-20 16:54:55 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-10-21 16:14:59 -0700 |
| commit | 24f0692bfd41fd207d99c993a5785c3426762046 (patch) | |
| tree | d8d8c44a44388bc88622c804945b44c2d8dd1f1f /drivers/acpi | |
| parent | cxl/pmem: Fix failure to account for 8 byte header for writes to the device LSA. (diff) | |
| download | linux-dev-24f0692bfd41fd207d99c993a5785c3426762046.tar.xz linux-dev-24f0692bfd41fd207d99c993a5785c3426762046.zip | |
ACPI: NUMA: Add CXL CFMWS 'nodes' to the possible nodes set
The ACPI CEDT.CFMWS indicates a range of possible address where new CXL
regions can appear. Each range is associated with a QTG id (QoS
Throttling Group id). For each range + QTG pair that is not covered by a proximity
domain in the SRAT, Linux creates a new NUMA node. However, the commit
that added the new ranges missed updating the node_possible mask which
causes memory_group_register() to fail. Add the new nodes to the
nodes_possible mask.
Cc: <stable@vger.kernel.org>
Fixes: fd49f99c1809 ("ACPI: NUMA: Add a node and memblk for each CFMWS not in SRAT")
Cc: Alison Schofield <alison.schofield@intel.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reported-by: Vishal Verma <vishal.l.verma@intel.com>
Tested-by: Vishal Verma <vishal.l.verma@intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Vishal Verma <vishal.l.verma@intel.com>
Link: https://lore.kernel.org/r/166631003537.1167078.9373680312035292395.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/acpi')
| -rw-r--r-- | drivers/acpi/numa/srat.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/acpi/numa/srat.c b/drivers/acpi/numa/srat.c index 3b818ab186be..1f4fc5f8a819 100644 --- a/drivers/acpi/numa/srat.c +++ b/drivers/acpi/numa/srat.c @@ -327,6 +327,7 @@ static int __init acpi_parse_cfmws(union acpi_subtable_headers *header, pr_warn("ACPI NUMA: Failed to add memblk for CFMWS node %d [mem %#llx-%#llx]\n", node, start, end); } + node_set(node, numa_nodes_parsed); /* Set the next available fake_pxm value */ (*fake_pxm)++; |