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| author |   Linus Walleij <linus.walleij@linaro.org> | 2017-08-08 21:07:04 +0200 |
|---|---|---|
| committer |   Tejun Heo <tj@kernel.org> | 2017-08-11 10:31:49 -0700 |
| commit | d99058a232e78c580e92ecf2670eabdbd68a5f2c (patch) | |
| tree | 11a8c0421d2e32cc6fc0bdb834e6d488a3aaae92 /drivers/ata | |
| parent | ata: ahci_platform: Add shutdown handler (diff) | |
| download | linux-dev-d99058a232e78c580e92ecf2670eabdbd68a5f2c.tar.xz linux-dev-d99058a232e78c580e92ecf2670eabdbd68a5f2c.zip | |
ata: sata_gemini: Retire custom pin control
I added a proper pin control driver for the Gemini SoC, so retire
this custom code and rely on the pin controller to set up the pads.
The "IOMUX" which is routing signals between the ATA and SATA
bridge inside of the chip is not about pin control and remains in
place.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers/ata')
| -rw-r--r-- | drivers/ata/sata_gemini.c | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/drivers/ata/sata_gemini.c b/drivers/ata/sata_gemini.c index 373051ea8211..071e49971f6d 100644 --- a/drivers/ata/sata_gemini.c +++ b/drivers/ata/sata_gemini.c @@ -43,17 +43,6 @@ struct sata_gemini { struct clk *sata1_pclk; }; -/* Global IDE PAD Skew Control Register */ -#define GEMINI_GLOBAL_IDE_SKEW_CTRL 0x18 -#define GEMINI_IDE1_HOST_STROBE_DELAY_SHIFT 28 -#define GEMINI_IDE1_DEVICE_STROBE_DELAY_SHIFT 24 -#define GEMINI_IDE1_OUTPUT_IO_SKEW_SHIFT 20 -#define GEMINI_IDE1_INPUT_IO_SKEW_SHIFT 16 -#define GEMINI_IDE0_HOST_STROBE_DELAY_SHIFT 12 -#define GEMINI_IDE0_DEVICE_STROBE_DELAY_SHIFT 8 -#define GEMINI_IDE0_OUTPUT_IO_SKEW_SHIFT 4 -#define GEMINI_IDE0_INPUT_IO_SKEW_SHIFT 0 - /* Miscellaneous Control Register */ #define GEMINI_GLOBAL_MISC_CTRL 0x30 /* @@ -91,8 +80,6 @@ struct sata_gemini { #define GEMINI_IDE_IOMUX_MODE2 (2 << 24) #define GEMINI_IDE_IOMUX_MODE3 (3 << 24) #define GEMINI_IDE_IOMUX_SHIFT (24) -#define GEMINI_IDE_PADS_ENABLE BIT(4) -#define GEMINI_PFLASH_PADS_DISABLE BIT(1) /* * Registers directly controlling the PATA<->SATA adapters @@ -310,7 +297,6 @@ static int gemini_sata_probe(struct platform_device *pdev) enum gemini_muxmode muxmode; u32 gmode; u32 gmask; - u32 val; int ret; sg = devm_kzalloc(dev, sizeof(*sg), GFP_KERNEL); @@ -362,16 +348,6 @@ static int gemini_sata_probe(struct platform_device *pdev) gmask = GEMINI_IDE_IOMUX_MASK; gmode = (muxmode << GEMINI_IDE_IOMUX_SHIFT); - /* - * If we mux out the IDE, parallel flash must be disabled. - * SATA0 and SATA1 have dedicated pins and may coexist with - * parallel flash. - */ - if (sg->ide_pins) - gmode |= GEMINI_IDE_PADS_ENABLE | GEMINI_PFLASH_PADS_DISABLE; - else - gmask |= GEMINI_IDE_PADS_ENABLE; - ret = regmap_update_bits(map, GEMINI_GLOBAL_MISC_CTRL, gmask, gmode); if (ret) { dev_err(dev, "unable to set up IDE muxing\n"); @@ -379,16 +355,6 @@ static int gemini_sata_probe(struct platform_device *pdev) goto out_unprep_clk; } - /* FIXME: add more elaborate IDE skew control handling */ - if (sg->ide_pins) { - ret = regmap_read(map, GEMINI_GLOBAL_IDE_SKEW_CTRL, &val); - if (ret) { - dev_err(dev, "cannot read IDE skew control register\n"); - return ret; - } - dev_info(dev, "IDE skew control: %08x\n", val); - } - dev_info(dev, "set up the Gemini IDE/SATA nexus\n"); platform_set_drvdata(pdev, sg); sg_singleton = sg; |