diff options
| author |   Sudeep Holla <sudeep.holla@arm.com> | 2022-07-04 11:15:53 +0100 |
|---|---|---|
| committer | Sudeep Holla <sudeep.holla@arm.com> | 2022-07-04 16:22:28 +0100 |
| commit | 38db9b95464f82fed28794afe0214d9439d86f7c (patch) | |
| tree | 7c9832e04afeeb5b21fce2d7da89809c8ef9eb93 /drivers/base | |
| parent | cacheinfo: Align checks in cache_shared_cpu_map_{setup,remove} for readability (diff) | |
| download | linux-dev-38db9b95464f82fed28794afe0214d9439d86f7c.tar.xz linux-dev-38db9b95464f82fed28794afe0214d9439d86f7c.zip | |
arch_topology: Add support to parse and detect cache attributes
Currently ACPI populates just the minimum information about the last
level cache from PPTT in order to feed the same to build sched_domains.
Similar support for DT platforms is not present.
In order to enable the same, the entire cache hierarchy information can
be built as part of CPU topoplogy parsing both on ACPI and DT platforms.
Note that this change builds the cacheinfo early even on ACPI systems,
but the current mechanism of building llc_sibling mask remains unchanged.
Link: https://lore.kernel.org/r/20220704101605.1318280-10-sudeep.holla@arm.com
Tested-by: Ionela Voinescu <ionela.voinescu@arm.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'drivers/base')
| -rw-r--r-- | drivers/base/arch_topology.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index 579c851a2bd7..e2f7d9ea558e 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -7,6 +7,7 @@ */ #include <linux/acpi.h> +#include <linux/cacheinfo.h> #include <linux/cpu.h> #include <linux/cpufreq.h> #include <linux/device.h> @@ -780,15 +781,28 @@ __weak int __init parse_acpi_topology(void) #if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) void __init init_cpu_topology(void) { + int ret, cpu; + reset_cpu_topology(); + ret = parse_acpi_topology(); + if (!ret) + ret = of_have_populated_dt() && parse_dt_topology(); - /* - * Discard anything that was parsed if we hit an error so we - * don't use partial information. - */ - if (parse_acpi_topology()) - reset_cpu_topology(); - else if (of_have_populated_dt() && parse_dt_topology()) + if (ret) { + /* + * Discard anything that was parsed if we hit an error so we + * don't use partial information. + */ reset_cpu_topology(); + return; + } + + for_each_possible_cpu(cpu) { + ret = detect_cache_attributes(cpu); + if (ret) { + pr_info("Early cacheinfo failed, ret = %d\n", ret); + break; + } + } } #endif |