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| author |   Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-11-02 17:30:47 +0800 |
|---|---|---|
| committer |   Chris Wilson <chris@chris-wilson.co.uk> | 2010-11-04 09:39:28 +0000 |
| commit | 8d0f56708292ca5c256ee3b7187d124afee81d93 (patch) | |
| tree | 408b76c17505b7607eb0ef7a075c504239e7931f /drivers/char | |
| parent | drm/i915; Don't apply Ironlake FDI clock workaround to Sandybridge (diff) | |
| download | linux-dev-8d0f56708292ca5c256ee3b7187d124afee81d93.tar.xz linux-dev-8d0f56708292ca5c256ee3b7187d124afee81d93.zip | |
agp/intel: restore cache behavior on sandybridge
This restores cache behavior for default AGP_USER_MEMORY as
uncached, and leave default AGP_USER_CACHED_MEMORY as LLC only.
I've seen different cache behavior on one sandybridge desktop CPU vs.
another mobile CPU. Until we figure out how to detect the real cache
config, restore back to the original behavior now.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/char')
| -rw-r--r-- | drivers/char/agp/intel-gtt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 6b6760ea2435..791216d33ed0 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -1210,7 +1210,7 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry, unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT; u32 pte_flags; - if (type_mask == AGP_USER_UNCACHED_MEMORY) + if (type_mask == AGP_USER_MEMORY) pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID; else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC) { pte_flags = GEN6_PTE_LLC | I810_PTE_VALID; |