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| author |   Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2014-09-15 18:15:53 +0200 |
|---|---|---|
| committer |   Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-09-22 11:38:59 +0200 |
| commit | bcc5fd49a0fda5abc22057f65b318788ccb5d2ad (patch) | |
| tree | edf97c273ea66306e5a6fdd81e6c5a78d31e8873 /drivers/clk/at91/pmc.h | |
| parent | ARM: at91: Remove the support for the RSI EWS board (diff) | |
| download | linux-dev-bcc5fd49a0fda5abc22057f65b318788ccb5d2ad.tar.xz linux-dev-bcc5fd49a0fda5abc22057f65b318788ccb5d2ad.zip | |
clk: at91: add a driver for the h32mx clock
Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix
interconnect (h32mx) has a clock that can be setup at the half of the h64mx
clock (which is mck). The h32mx clock can not exceed 90 MHz.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'drivers/clk/at91/pmc.h')
| -rw-r--r-- | drivers/clk/at91/pmc.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 6c7625976113..52d2041fa3f6 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -120,4 +120,9 @@ extern void __init of_at91sam9x5_clk_smd_setup(struct device_node *np, struct at91_pmc *pmc); #endif +#if defined(CONFIG_HAVE_AT91_SMD) +extern void __init of_sama5d4_clk_h32mx_setup(struct device_node *np, + struct at91_pmc *pmc); +#endif + #endif /* __PMC_H_ */ |