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| author |   Michał Mirosław <mirq-linux@rere.qmqm.pl> | 2018-12-18 12:20:48 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2019-02-22 09:54:17 -0800 |
| commit | bb631af3d55fa89a612a5f09f3a3dda76121385a (patch) | |
| tree | 9a3d0af2bb4df8bea05ee70dae1d36f3414ff51f /drivers/clk/at91 | |
| parent | clk: at91: enable AUDIOPLL as source for PCKx on SAMA5D2 (diff) | |
| download | linux-dev-bb631af3d55fa89a612a5f09f3a3dda76121385a.tar.xz linux-dev-bb631af3d55fa89a612a5f09f3a3dda76121385a.zip | |
clk: at91: optimize clk_round_rate() for AUDIO_PLL
Stop the search for parent rate when exact match is found.
This makes for 3 clk_round_rate() calls instead of 64 of them on
SAMA5D2-based board when searching for 12.288MHz clock.
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/at91')
| -rw-r--r-- | drivers/clk/at91/clk-audio-pll.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/clk/at91/clk-audio-pll.c b/drivers/clk/at91/clk-audio-pll.c index 36d77146a3bd..3cc4a82f4e9f 100644 --- a/drivers/clk/at91/clk-audio-pll.c +++ b/drivers/clk/at91/clk-audio-pll.c @@ -340,7 +340,12 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, pr_debug("A PLL/PMC: %s, rate = %lu (parent_rate = %lu)\n", __func__, rate, *parent_rate); - for (div = 1; div <= AUDIO_PLL_QDPMC_MAX; div++) { + if (!rate) + return 0; + + best_parent_rate = clk_round_rate(pclk->clk, 1); + div = max(best_parent_rate / rate, 1UL); + for (; div <= AUDIO_PLL_QDPMC_MAX; div++) { best_parent_rate = clk_round_rate(pclk->clk, rate * div); tmp_rate = best_parent_rate / div; tmp_diff = abs(rate - tmp_rate); @@ -350,6 +355,8 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, best_rate = tmp_rate; best_diff = tmp_diff; tmp_qd = div; + if (!best_diff) + break; /* got exact match */ } } |