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| author |   Axel Lin <axel.lin@ingics.com> | 2013-05-01 23:32:05 +0800 |
|---|---|---|
| committer |   Mike Turquette <mturquette@linaro.org> | 2013-05-28 23:50:52 -0700 |
| commit | bcc7fd20e2e9df6f29db7d524623e0c7023dffc6 (patch) | |
| tree | 92dba86c5718046692db858dabd5c4845cbc80b2 /drivers/clk/clk-wm831x.c | |
| parent | clk: wm831x: Fix update wrong register for enable/disable FLL (diff) | |
| download | linux-dev-bcc7fd20e2e9df6f29db7d524623e0c7023dffc6.tar.xz linux-dev-bcc7fd20e2e9df6f29db7d524623e0c7023dffc6.zip | |
clk: wm831x: Fix wm831x_clkout_get_parent
Current code looks strange because calling wm831x_clkout_set_parent() with 0 as
parent parameter, wm831x_clkout_get_parent() will return 1.
According to the datasheet:
R16528 (4090h) Clock Control1
BIT 0: CLKOUT output source select
0 = FLL output
1 = 32.768kHz oscillator
Thus fix the entry order in wm831x_clkout_parents[] to make it has
the same meaning as the datasheet and make the return value
of wm831x_clkout_get_parent() consistent with the parent pass to
wm831x_clkout_set_parent().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/clk-wm831x.c')
| -rw-r--r-- | drivers/clk/clk-wm831x.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c index 4bdf0b0cab92..58d08a640275 100644 --- a/drivers/clk/clk-wm831x.c +++ b/drivers/clk/clk-wm831x.c @@ -299,8 +299,8 @@ static void wm831x_clkout_unprepare(struct clk_hw *hw) } static const char *wm831x_clkout_parents[] = { - "xtal", "fll", + "xtal", }; static u8 wm831x_clkout_get_parent(struct clk_hw *hw) @@ -318,9 +318,9 @@ static u8 wm831x_clkout_get_parent(struct clk_hw *hw) } if (ret & WM831X_CLKOUT_SRC) - return 0; - else return 1; + else + return 0; } static int wm831x_clkout_set_parent(struct clk_hw *hw, u8 parent) |