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| author |   Mike Looijmans <mike.looijmans@topic.nl> | 2015-06-03 07:25:19 +0200 |
|---|---|---|
| committer |   Michael Turquette <mturquette@linaro.org> | 2015-06-03 15:21:07 -0700 |
| commit | 19fbbbbcd3a3a8e307a4768784166abf7b55b779 (patch) | |
| tree | 36048c4d31b19808fec723eb4921236ebe8d32f9 /drivers/clk/hisilicon/clk.c | |
| parent | clk: mvebu: add missing CESA gate clk (diff) | |
| download | linux-dev-19fbbbbcd3a3a8e307a4768784166abf7b55b779.tar.xz linux-dev-19fbbbbcd3a3a8e307a4768784166abf7b55b779.zip | |
Add TI CDCE925 I2C controlled clock synthesizer driver
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only supports the following setup,
and uses a fixed setting for the output muxes:
Y1 is derived from the input clock
Y2 and Y3 derive from PLL1
Y4 and Y5 derive from PLL2
Given a target output frequency, the driver will set the PLL and
divider to best approximate the desired output.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/hisilicon/clk.c')
0 files changed, 0 insertions, 0 deletions