diff options
| author |   Li Jun <jun.li@nxp.com> | 2019-07-10 19:19:16 +0800 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2019-08-03 09:16:03 +0200 |
| commit | 0d381f4c80ee1d885cba14f1004bdc6f17507b63 (patch) | |
| tree | 1ef5a2980d70d44c7d657b04b9aaaace0daa8ef5 /drivers/clk/imx | |
| parent | clk: imx8mq: Remove CLK_IS_CRITICAL flag for IMX8MQ_CLK_TMU_ROOT (diff) | |
| download | linux-dev-0d381f4c80ee1d885cba14f1004bdc6f17507b63.tar.xz linux-dev-0d381f4c80ee1d885cba14f1004bdc6f17507b63.zip | |
clk: imx8mq: set correct parent for usb ctrl clocks
Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
and usb2_ctrl_root_clk is usb_bus.
Signed-off-by: Li Jun <jun.li@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx')
| -rw-r--r-- | drivers/clk/imx/clk-imx8mq.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index 91de69a59490..4328c22df048 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -523,8 +523,8 @@ static int imx8mq_clocks_probe(struct platform_device *pdev) clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0); clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0); clks[IMX8MQ_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0); - clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0); - clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_core_ref", base + 0x44e0, 0); + clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0); + clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_bus", base + 0x44e0, 0); clks[IMX8MQ_CLK_USB1_PHY_ROOT] = imx_clk_gate4("usb1_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0); clks[IMX8MQ_CLK_USB2_PHY_ROOT] = imx_clk_gate4("usb2_phy_root_clk", "usb_phy_ref", base + 0x4500, 0); clks[IMX8MQ_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0); |