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| author |   Paul Cercueil <paul@crapouillou.net> | 2018-05-20 16:31:15 +0000 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2018-06-01 23:21:33 -0700 |
| commit | 45ba63a29fd9b8a461110185e3abc5b4c90b806a (patch) | |
| tree | 4f738cd552bd9bde371143d97cb1cababd9843a8 /drivers/clk/ingenic | |
| parent | clk: ingenic: jz4770: Change OTG from custom to standard gated clock (diff) | |
| download | linux-dev-45ba63a29fd9b8a461110185e3abc5b4c90b806a.tar.xz linux-dev-45ba63a29fd9b8a461110185e3abc5b4c90b806a.zip | |
clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle
When the main processor goes idle, by default its clock is stopped.
However, this also stops the clock of the co-processor.
Here, if the C1CLK clock is enabled, we disable this functionality.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/ingenic')
| -rw-r--r-- | drivers/clk/ingenic/jz4770-cgu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/ingenic/jz4770-cgu.c b/drivers/clk/ingenic/jz4770-cgu.c index 226c8016f6b0..a5ad69464e57 100644 --- a/drivers/clk/ingenic/jz4770-cgu.c +++ b/drivers/clk/ingenic/jz4770-cgu.c @@ -162,9 +162,10 @@ static const struct ingenic_cgu_clk_info jz4770_cgu_clocks[] = { .div = { CGU_REG_CPCCR, 16, 1, 4, 22, -1, -1 }, }, [JZ4770_CLK_C1CLK] = { - "c1clk", CGU_CLK_DIV, + "c1clk", CGU_CLK_DIV | CGU_CLK_GATE, .parents = { JZ4770_CLK_PLL0, }, .div = { CGU_REG_CPCCR, 12, 1, 4, 22, -1, -1 }, + .gate = { CGU_REG_OPCR, 31, true }, // disable CCLK stop on idle }, [JZ4770_CLK_PCLK] = { "pclk", CGU_CLK_DIV, |