aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clk/mediatek/clk-mt8183-ipu0.c
diff options
context:
space:
mode:
authorMiles Chen <miles.chen@mediatek.com>2022-09-22 17:18:34 +0800
committerChen-Yu Tsai <wenst@chromium.org>2022-09-26 11:13:45 +0800
commitd36d697a00f1896acc305e93501697cf2ba1da54 (patch)
tree074e3dc63cb8737d69a3a201c19978f31fdb2694 /drivers/clk/mediatek/clk-mt8183-ipu0.c
parentclk: mediatek: mt6797: use mtk_clk_simple_probe to simplify driver (diff)
downloadlinux-dev-d36d697a00f1896acc305e93501697cf2ba1da54.tar.xz
linux-dev-d36d697a00f1896acc305e93501697cf2ba1da54.zip
clk: mediatek: mt8183: use mtk_clk_simple_probe to simplify driver
mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220922091841.4099-7-miles.chen@mediatek.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt8183-ipu0.c')
-rw-r--r--drivers/clk/mediatek/clk-mt8183-ipu0.c27
1 files changed, 12 insertions, 15 deletions
diff --git a/drivers/clk/mediatek/clk-mt8183-ipu0.c b/drivers/clk/mediatek/clk-mt8183-ipu0.c
index b30fc9f47518..953a8a33d048 100644
--- a/drivers/clk/mediatek/clk-mt8183-ipu0.c
+++ b/drivers/clk/mediatek/clk-mt8183-ipu0.c
@@ -27,26 +27,23 @@ static const struct mtk_gate ipu_core0_clks[] = {
GATE_IPU_CORE0(CLK_IPU_CORE0_IPU, "ipu_core0_ipu", "dsp_sel", 2),
};
-static int clk_mt8183_ipu_core0_probe(struct platform_device *pdev)
-{
- struct clk_hw_onecell_data *clk_data;
- struct device_node *node = pdev->dev.of_node;
-
- clk_data = mtk_alloc_clk_data(CLK_IPU_CORE0_NR_CLK);
-
- mtk_clk_register_gates(node, ipu_core0_clks, ARRAY_SIZE(ipu_core0_clks),
- clk_data);
-
- return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-}
+static const struct mtk_clk_desc ipu_core0_desc = {
+ .clks = ipu_core0_clks,
+ .num_clks = ARRAY_SIZE(ipu_core0_clks),
+};
static const struct of_device_id of_match_clk_mt8183_ipu_core0[] = {
- { .compatible = "mediatek,mt8183-ipu_core0", },
- {}
+ {
+ .compatible = "mediatek,mt8183-ipu_core0",
+ .data = &ipu_core0_desc,
+ }, {
+ /* sentinel */
+ }
};
static struct platform_driver clk_mt8183_ipu_core0_drv = {
- .probe = clk_mt8183_ipu_core0_probe,
+ .probe = mtk_clk_simple_probe,
+ .remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt8183-ipu_core0",
.of_match_table = of_match_clk_mt8183_ipu_core0,