aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clk/mediatek/clk-mux.c
diff options
context:
space:
mode:
authorChen-Yu Tsai <wenst@chromium.org>2022-09-27 12:11:21 +0200
committerChen-Yu Tsai <wenst@chromium.org>2022-09-29 12:05:13 +0800
commitb66add7a74e84a915dc8e1da89e192751e74bb4c (patch)
treed8c712464bb45fc9dbfb14fddb80072f7f0c8749 /drivers/clk/mediatek/clk-mux.c
parentclk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent (diff)
downloadlinux-dev-b66add7a74e84a915dc8e1da89e192751e74bb4c.tar.xz
linux-dev-b66add7a74e84a915dc8e1da89e192751e74bb4c.zip
clk: mediatek: mux: add clk notifier functions
With device frequency scaling, the mux clock that (indirectly) feeds the device selects between a dedicated PLL, and some other stable clocks. When a clk rate change is requested, the (normally) upstream PLL is reconfigured. It's possible for the clock output of the PLL to become unstable during this process. To avoid causing the device to glitch, the mux should temporarily be switched over to another "stable" clock during the PLL rate change. This is done with clk notifiers. This patch adds common functions for notifiers to temporarily and transparently reparent mux clocks. This was loosely based on commit 8adfb08605a9 ("clk: sunxi-ng: mux: Add clk notifier functions"). Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> [Angelo: Changed mtk_mux_nb to hold a pointer to clk_ops instead of mtk_mux] Co-developed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220927101128.44758-4-angelogioacchino.delregno@collabora.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mux.c')
-rw-r--r--drivers/clk/mediatek/clk-mux.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/clk-mux.c b/drivers/clk/mediatek/clk-mux.c
index cd5f9fd8cb98..4421e4859257 100644
--- a/drivers/clk/mediatek/clk-mux.c
+++ b/drivers/clk/mediatek/clk-mux.c
@@ -4,6 +4,7 @@
* Author: Owen Chen <owen.chen@mediatek.com>
*/
+#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/compiler_types.h>
#include <linux/container_of.h>
@@ -259,4 +260,41 @@ void mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num,
}
EXPORT_SYMBOL_GPL(mtk_clk_unregister_muxes);
+/*
+ * This clock notifier is called when the frequency of the parent
+ * PLL clock is to be changed. The idea is to switch the parent to a
+ * stable clock, such as the main oscillator, while the PLL frequency
+ * stabilizes.
+ */
+static int mtk_clk_mux_notifier_cb(struct notifier_block *nb,
+ unsigned long event, void *_data)
+{
+ struct clk_notifier_data *data = _data;
+ struct clk_hw *hw = __clk_get_hw(data->clk);
+ struct mtk_mux_nb *mux_nb = to_mtk_mux_nb(nb);
+ int ret = 0;
+
+ switch (event) {
+ case PRE_RATE_CHANGE:
+ mux_nb->original_index = mux_nb->ops->get_parent(hw);
+ ret = mux_nb->ops->set_parent(hw, mux_nb->bypass_index);
+ break;
+ case POST_RATE_CHANGE:
+ case ABORT_RATE_CHANGE:
+ ret = mux_nb->ops->set_parent(hw, mux_nb->original_index);
+ break;
+ }
+
+ return notifier_from_errno(ret);
+}
+
+int devm_mtk_clk_mux_notifier_register(struct device *dev, struct clk *clk,
+ struct mtk_mux_nb *mux_nb)
+{
+ mux_nb->nb.notifier_call = mtk_clk_mux_notifier_cb;
+
+ return devm_clk_notifier_register(dev, clk, &mux_nb->nb);
+}
+EXPORT_SYMBOL_GPL(devm_mtk_clk_mux_notifier_register);
+
MODULE_LICENSE("GPL");