aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clk/meson/clk-input.c
diff options
context:
space:
mode:
authorStephen Boyd <sboyd@kernel.org>2018-12-13 01:05:44 -0800
committerStephen Boyd <sboyd@kernel.org>2018-12-13 01:05:44 -0800
commite74581b79ddd9b49b8c61e2791fc4dffc0245afb (patch)
tree5ab61c8c9120ff519d6e4802555962d4c1ec7619 /drivers/clk/meson/clk-input.c
parentclk: meson: Mark some things static (diff)
parentclk: meson: axg-audio: use the clk input helper function (diff)
downloadlinux-dev-e74581b79ddd9b49b8c61e2791fc4dffc0245afb.tar.xz
linux-dev-e74581b79ddd9b49b8c61e2791fc4dffc0245afb.zip
Merge tag 'meson-clk-4.21-2' of https://github.com/BayLibre/clk-meson into clk-meson
Pull more meson clk driver updates from Neil Armstrong: - Fix GXL HDMI Pll fractional bits (from first round) - Add the Meson8/Meson8b video clocks - Add clk-input helper and use it for axg-audio clock driver * tag 'meson-clk-4.21-2' of https://github.com/BayLibre/clk-meson: clk: meson: axg-audio: use the clk input helper function clk: meson: add clk-input helper function clk: meson: meson8b: add the read-only video clock trees clk: meson: meson8b: add the fractional divider for vid_pll_dco clk: meson: meson8b: fix the offset of vid_pll_dco's N value clk: meson: Fix GXL HDMI PLL fractional bits width
Diffstat (limited to 'drivers/clk/meson/clk-input.c')
-rw-r--r--drivers/clk/meson/clk-input.c44
1 files changed, 44 insertions, 0 deletions
diff --git a/drivers/clk/meson/clk-input.c b/drivers/clk/meson/clk-input.c
new file mode 100644
index 000000000000..06b3e3bb6a66
--- /dev/null
+++ b/drivers/clk/meson/clk-input.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 BayLibre, SAS.
+ * Author: Jerome Brunet <jbrunet@baylibre.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/device.h>
+#include "clkc.h"
+
+static const struct clk_ops meson_clk_no_ops = {};
+
+struct clk_hw *meson_clk_hw_register_input(struct device *dev,
+ const char *of_name,
+ const char *clk_name,
+ unsigned long flags)
+{
+ struct clk *parent_clk = devm_clk_get(dev, of_name);
+ struct clk_init_data init;
+ const char *parent_name;
+ struct clk_hw *hw;
+ int ret;
+
+ if (IS_ERR(parent_clk))
+ return (struct clk_hw *)parent_clk;
+
+ hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
+ if (!hw)
+ return ERR_PTR(-ENOMEM);
+
+ parent_name = __clk_get_name(parent_clk);
+ init.name = clk_name;
+ init.ops = &meson_clk_no_ops;
+ init.flags = flags;
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+ hw->init = &init;
+
+ ret = devm_clk_hw_register(dev, hw);
+
+ return ret ? ERR_PTR(ret) : hw;
+}
+EXPORT_SYMBOL_GPL(meson_clk_hw_register_input);