diff options
| author |   Chao Xie <chao.xie@marvell.com> | 2015-04-30 09:53:41 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@codeaurora.org> | 2015-06-04 12:07:49 -0700 |
| commit | 6644fddf062e1fa9bd56e74dfeaf864a14bf08cb (patch) | |
| tree | 6d2153811f8b73a71cdad2302e14b965ce06092b /drivers/clk/mmp/clk-mmp2.c | |
| parent | clk: mmp: add fixed clock UBS_PLL for pxa910/pxa168 (diff) | |
| download | linux-dev-6644fddf062e1fa9bd56e74dfeaf864a14bf08cb.tar.xz linux-dev-6644fddf062e1fa9bd56e74dfeaf864a14bf08cb.zip | |
clk: mmp: Fix the wrong factor table for uart PLL
The suggested value in the mmp2 manual is wrong.
There are only 13 bits for numerator, but some suggested
value has 14 bits.
Fix the factor tabled and remove the unused items.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/mmp/clk-mmp2.c')
| -rw-r--r-- | drivers/clk/mmp/clk-mmp2.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/clk/mmp/clk-mmp2.c b/drivers/clk/mmp/clk-mmp2.c index 5c90a4230fa3..09d2832fbd78 100644 --- a/drivers/clk/mmp/clk-mmp2.c +++ b/drivers/clk/mmp/clk-mmp2.c @@ -63,10 +63,8 @@ static struct mmp_clk_factor_masks uart_factor_masks = { }; static struct mmp_clk_factor_tbl uart_factor_tbl[] = { - {.num = 14634, .den = 2165}, /*14.745MHZ */ + {.num = 8125, .den = 1536}, /*14.745MHZ */ {.num = 3521, .den = 689}, /*19.23MHZ */ - {.num = 9679, .den = 5728}, /*58.9824MHZ */ - {.num = 15850, .den = 9451}, /*59.429MHZ */ }; static const char *uart_parent[] = {"uart_pll", "vctcxo"}; |