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authorLee Jones <lee.jones@linaro.org>2021-01-26 12:45:32 +0000
committerStephen Boyd <sboyd@kernel.org>2021-02-11 11:56:05 -0800
commitb92b01bd92c245178b1e89f684b00456fe7d9893 (patch)
tree802c7b83c3f4faeeb4c103c300f545a13bf447da /drivers/clk/qcom/gcc-ipq4019.c
parentclk: ti: dpll44xx: Fix some potential doc-rot (diff)
downloadlinux-dev-b92b01bd92c245178b1e89f684b00456fe7d9893.tar.xz
linux-dev-b92b01bd92c245178b1e89f684b00456fe7d9893.zip
clk: qcom: gcc-ipq4019: Remove unused variable 'ret'
Fixes the following W=1 kernel build warning(s): drivers/clk/qcom/gcc-ipq4019.c: In function ‘clk_cpu_div_set_rate’: drivers/clk/qcom/gcc-ipq4019.c:1279:6: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable] Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-arm-msm@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20210126124540.3320214-14-lee.jones@linaro.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/gcc-ipq4019.c')
-rw-r--r--drivers/clk/qcom/gcc-ipq4019.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c
index ef5137fd50f3..8abad4032de7 100644
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1276,16 +1276,15 @@ static int clk_cpu_div_set_rate(struct clk_hw *hw, unsigned long rate,
struct clk_fepll *pll = to_clk_fepll(hw);
const struct freq_tbl *f;
u32 mask;
- int ret;
f = qcom_find_freq(pll->freq_tbl, rate);
if (!f)
return -EINVAL;
mask = (BIT(pll->cdiv.width) - 1) << pll->cdiv.shift;
- ret = regmap_update_bits(pll->cdiv.clkr.regmap,
- pll->cdiv.reg, mask,
- f->pre_div << pll->cdiv.shift);
+ regmap_update_bits(pll->cdiv.clkr.regmap,
+ pll->cdiv.reg, mask,
+ f->pre_div << pll->cdiv.shift);
/*
* There is no status bit which can be checked for successful CPU
* divider update operation so using delay for the same.