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| author |   AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> | 2021-01-14 23:10:52 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2021-02-08 10:17:49 -0800 |
| commit | b791620cf4b4f9fcfd2c1ea660e79f9539bee2d8 (patch) | |
| tree | 66392685b48d5610c39829b454f509aebf50c4dc /drivers/clk/qcom | |
| parent | dt-bindings: clock: gcc-msm8998: Add HMSS_GPLL0_CLK_SRC definition (diff) | |
| download | linux-dev-b791620cf4b4f9fcfd2c1ea660e79f9539bee2d8.tar.xz linux-dev-b791620cf4b4f9fcfd2c1ea660e79f9539bee2d8.zip | |
clk: qcom: gcc-msm8998: Add missing hmss_gpll0_clk_src clock
To achieve CPR-Hardened functionality this clock must be on: add it
in order to be able to get it managed by the CPR3 driver.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210114221059.483390-5-angelogioacchino.delregno@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom')
| -rw-r--r-- | drivers/clk/qcom/gcc-msm8998.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index d51c556851ca..c8d4c0348952 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2160,6 +2160,25 @@ static struct clk_branch gcc_hmss_trig_clk = { }, }; +static struct freq_tbl ftbl_hmss_gpll0_clk_src[] = { + F( 300000000, P_GPLL0_OUT_MAIN, 2, 0, 0), + F( 600000000, P_GPLL0_OUT_MAIN, 1, 0, 0), + { } +}; + +static struct clk_rcg2 hmss_gpll0_clk_src = { + .cmd_rcgr = 0x4805c, + .hid_width = 5, + .parent_map = gcc_parent_map_1, + .freq_tbl = ftbl_hmss_gpll0_clk_src, + .clkr.hw.init = &(struct clk_init_data) { + .name = "hmss_gpll0_clk_src", + .parent_names = gcc_parent_names_1, + .num_parents = ARRAY_SIZE(gcc_parent_names_1), + .ops = &clk_rcg2_ops, + }, +}; + static struct clk_branch gcc_mmss_noc_cfg_ahb_clk = { .halt_reg = 0x9004, .halt_check = BRANCH_HALT, @@ -2961,6 +2980,7 @@ static struct clk_regmap *gcc_msm8998_clocks[] = { [GCC_MSS_SNOC_AXI_CLK] = &gcc_mss_snoc_axi_clk.clkr, [GCC_MSS_MNOC_BIMC_AXI_CLK] = &gcc_mss_mnoc_bimc_axi_clk.clkr, [GCC_MMSS_GPLL0_CLK] = &gcc_mmss_gpll0_clk.clkr, + [HMSS_GPLL0_CLK_SRC] = &hmss_gpll0_clk_src.clkr, }; static struct gdsc *gcc_msm8998_gdscs[] = { |