diff options
| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2020-11-17 10:03:27 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-01-12 12:35:13 +0100 |
| commit | 010ce438e7bba81ae1b525795ec2f5313d78485a (patch) | |
| tree | b6f90f02259cf36e1a7f01b83d73ab1adc0e0cc4 /drivers/clk/renesas | |
| parent | clk: renesas: r8a779a0: Add PFC/GPIO clocks (diff) | |
| download | linux-dev-010ce438e7bba81ae1b525795ec2f5313d78485a.tar.xz linux-dev-010ce438e7bba81ae1b525795ec2f5313d78485a.zip | |
clk: renesas: r8a779a0: Add MSIOF clocks
Add the module clocks used by the Clock-Synchronized Serial Interface
with FIFO (MSIOF) instances on the Renesas R-Car V3U (r8a779a0) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117090329.2128904-3-geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a779a0-cpg-mssr.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 1f4147254a46..067c71067fd4 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -158,6 +158,12 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { DEF_MOD("hscif1", 515, R8A779A0_CLK_S1D2), DEF_MOD("hscif2", 516, R8A779A0_CLK_S1D2), DEF_MOD("hscif3", 517, R8A779A0_CLK_S1D2), + DEF_MOD("msi0", 618, R8A779A0_CLK_MSO), + DEF_MOD("msi1", 619, R8A779A0_CLK_MSO), + DEF_MOD("msi2", 620, R8A779A0_CLK_MSO), + DEF_MOD("msi3", 621, R8A779A0_CLK_MSO), + DEF_MOD("msi4", 622, R8A779A0_CLK_MSO), + DEF_MOD("msi5", 623, R8A779A0_CLK_MSO), DEF_MOD("scif0", 702, R8A779A0_CLK_S1D8), DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8), DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8), |