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| author |   Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> | 2017-04-20 02:46:36 +0900 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2017-05-15 09:46:31 +0200 |
| commit | 60c2db767a54799f38744e6ffa556a4c1a9876aa (patch) | |
| tree | 79176e5c6f1a3611f0c14eb21c75ddf0c59c4b22 /drivers/clk/renesas | |
| parent | clk: renesas: r8a7796: Add Sound SRC clock (diff) | |
| download | linux-dev-60c2db767a54799f38744e6ffa556a4c1a9876aa.tar.xz linux-dev-60c2db767a54799f38744e6ffa556a4c1a9876aa.zip | |
clk: renesas: r8a7796: Add Sound DVC clocks
This patch adds adds SCU(DVC{0,1}) clocks for R8A7796 SoC.
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a7796-cpg-mssr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 5d65a4102354..63c664f1c2d7 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -220,6 +220,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), DEF_MOD("scu-all", 1017, R8A7796_CLK_S3D4), + DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)), + DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)), DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)), DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)), DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)), |