diff options
| author |   Heiko Stuebner <heiko@sntech.de> | 2014-11-20 20:38:50 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-11-25 09:57:07 +0100 |
| commit | 4f8a7c549f373f33c065c9cbb5a5f3f1a9d8f56c (patch) | |
| tree | 6c3adc9b74f0663ec871a0cc45309b7044657d68 /drivers/clk/rockchip/clk-pll.c | |
| parent | clk: rockchip: fix rk3188 USB HSIC PHY clock divider (diff) | |
| download | linux-dev-4f8a7c549f373f33c065c9cbb5a5f3f1a9d8f56c.tar.xz linux-dev-4f8a7c549f373f33c065c9cbb5a5f3f1a9d8f56c.zip | |
clk: rockchip: add ability to specify pll-specific flags
This adds a flag parameter to plls that allows us to create
special flags to tweak the behaviour of the plls if necessary.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/clk/rockchip/clk-pll.c')
| -rw-r--r-- | drivers/clk/rockchip/clk-pll.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index a3e886a38480..feb9cad3e676 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -39,6 +39,7 @@ struct rockchip_clk_pll { int lock_offset; unsigned int lock_shift; enum rockchip_pll_type type; + u8 flags; const struct rockchip_pll_rate_table *rate_table; unsigned int rate_count; spinlock_t *lock; @@ -282,7 +283,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, void __iomem *base, int con_offset, int grf_lock_offset, int lock_shift, int mode_offset, int mode_shift, struct rockchip_pll_rate_table *rate_table, - spinlock_t *lock) + u8 clk_pll_flags, spinlock_t *lock) { const char *pll_parents[3]; struct clk_init_data init; @@ -345,6 +346,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, pll->reg_base = base + con_offset; pll->lock_offset = grf_lock_offset; pll->lock_shift = lock_shift; + pll->flags = clk_pll_flags; pll->lock = lock; pll_clk = clk_register(NULL, &pll->hw); |