diff options
| author |   Elaine Zhang <zhangqing@rock-chips.com> | 2017-09-01 10:01:45 +0800 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2017-09-17 01:55:36 +0200 |
| commit | a4eb286565eb07ee5acfe6a1409f68ad9f663845 (patch) | |
| tree | 15ab9d6bf231b2e5f22fdfed5b0e1c83a98c3610 /drivers/clk/rockchip/clk-rk3128.c | |
| parent | clk: rockchip: add pclk_pmu as critical clock on rk3128 (diff) | |
| download | linux-dev-a4eb286565eb07ee5acfe6a1409f68ad9f663845.tar.xz linux-dev-a4eb286565eb07ee5acfe6a1409f68ad9f663845.zip | |
clk: rockchip: fix up rk3128 pvtm and mipi_24m gate regs error
A copy-paste error made them use the wrong bits in the register.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip/clk-rk3128.c')
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3128.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c index f15c9b874911..ce02d2cff608 100644 --- a/drivers/clk/rockchip/clk-rk3128.c +++ b/drivers/clk/rockchip/clk-rk3128.c @@ -315,13 +315,13 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = { RK2928_CLKGATE_CON(10), 8, GFLAGS), GATE(SCLK_PVTM_CORE, "clk_pvtm_core", "xin24m", 0, - RK2928_CLKGATE_CON(10), 8, GFLAGS), + RK2928_CLKGATE_CON(10), 0, GFLAGS), GATE(SCLK_PVTM_GPU, "clk_pvtm_gpu", "xin24m", 0, - RK2928_CLKGATE_CON(10), 8, GFLAGS), + RK2928_CLKGATE_CON(10), 1, GFLAGS), GATE(SCLK_PVTM_FUNC, "clk_pvtm_func", "xin24m", 0, - RK2928_CLKGATE_CON(10), 8, GFLAGS), + RK2928_CLKGATE_CON(10), 2, GFLAGS), GATE(SCLK_MIPI_24M, "clk_mipi_24m", "xin24m", CLK_IGNORE_UNUSED, - RK2928_CLKGATE_CON(10), 8, GFLAGS), + RK2928_CLKGATE_CON(2), 15, GFLAGS), COMPOSITE(SCLK_SDMMC, "sclk_sdmmc0", mux_mmc_src_p, 0, RK2928_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 6, DFLAGS, |