diff options
| author |   Heiko Stuebner <heiko@sntech.de> | 2013-03-18 13:43:52 +0900 |
|---|---|---|
| committer |   Kukjin Kim <kgene.kim@samsung.com> | 2013-03-28 14:46:03 +0900 |
| commit | 798ed613f5db7f61a7773412b9a6bc3d37d17ecb (patch) | |
| tree | 1fb1a600a39cf0a74963f59f859e9b04b14879c0 /drivers/clk/samsung/clk.h | |
| parent | ARM: dts: add board specific fixed rate clock nodes for Exynos based platforms (diff) | |
| download | linux-dev-798ed613f5db7f61a7773412b9a6bc3d37d17ecb.tar.xz linux-dev-798ed613f5db7f61a7773412b9a6bc3d37d17ecb.zip | |
clk: samsung: register clk_div_tables for divider clocks
On some Samsung platforms divider clocks only use specific divider
combinations like the armdiv on s3c2443 and s3c2416. For these
usecases the generic divider clock already provides the option of
providing a lookup table mapping register values to divider values.
Therefore add a new field to samsung_div_clock and if filled with a
table, use clk_register_divider_table instead of clk_register_divider
to register a divider clock
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/clk/samsung/clk.h')
| -rw-r--r-- | drivers/clk/samsung/clk.h | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index 961192ffd696..26a752b18f88 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -150,9 +150,10 @@ struct samsung_div_clock { u8 width; u8 div_flags; const char *alias; + struct clk_div_table *table; }; -#define __DIV(_id, dname, cname, pname, o, s, w, f, df, a) \ +#define __DIV(_id, dname, cname, pname, o, s, w, f, df, a, t) \ { \ .id = _id, \ .dev_name = dname, \ @@ -164,16 +165,20 @@ struct samsung_div_clock { .width = w, \ .div_flags = df, \ .alias = a, \ + .table = t, \ } #define DIV(_id, cname, pname, o, s, w) \ - __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL) + __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL, NULL) #define DIV_A(_id, cname, pname, o, s, w, a) \ - __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, a) + __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, a, NULL) #define DIV_F(_id, cname, pname, o, s, w, f, df) \ - __DIV(_id, NULL, cname, pname, o, s, w, f, df, NULL) + __DIV(_id, NULL, cname, pname, o, s, w, f, df, NULL, NULL) + +#define DIV_T(_id, cname, pname, o, s, w, t) \ + __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL, t) /** * struct samsung_gate_clock: information about gate clock |