diff options
| author |   Shiraz Hashim <shiraz.hashim@st.com> | 2012-11-10 12:13:41 +0530 |
|---|---|---|
| committer |   Mike Turquette <mturquette@linaro.org> | 2012-11-21 11:45:30 -0800 |
| commit | e0b9c2109b4686c343514823469013150d28b4c0 (patch) | |
| tree | 1988734de4752680ecc57fc97a7be8c757963cd3 /drivers/clk/spear/spear1310_clock.c | |
| parent | CLK: SPEAr: Fix dev_id & con_id for multiple clocks (diff) | |
| download | linux-dev-e0b9c2109b4686c343514823469013150d28b4c0.tar.xz linux-dev-e0b9c2109b4686c343514823469013150d28b4c0.zip | |
CLK: SPEAr13xx: Fix mux clock names
This patch updates mux clock names of multiple clocks. It updates _clk with
_mclk to make it more readable.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/spear/spear1310_clock.c')
| -rw-r--r-- | drivers/clk/spear/spear1310_clock.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c index f13b1d23b4a9..2f1cb7165bc7 100644 --- a/drivers/clk/spear/spear1310_clock.c +++ b/drivers/clk/spear/spear1310_clock.c @@ -633,7 +633,7 @@ void __init spear1310_clk_init(void) ARRAY_SIZE(clcd_pixel_parents), 0, SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT, SPEAR1310_CLCD_CLK_MASK, 0, &_lock); - clk_register_clkdev(clk, "clcd_pixel_clk", NULL); + clk_register_clkdev(clk, "clcd_pixel_mclk", NULL); clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0, SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0, @@ -645,7 +645,7 @@ void __init spear1310_clk_init(void) ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG, SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK, 0, &_lock); - clk_register_clkdev(clk, "i2s_src_clk", NULL); + clk_register_clkdev(clk, "i2s_src_mclk", NULL); clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0, SPEAR1310_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl, |