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authorChen-Yu Tsai <wens@csie.org>2017-05-19 15:06:08 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-06-07 15:32:15 +0200
commit13e0dde8b2ed043aa3e65437342d501715d975c1 (patch)
treeebc8e171a82bb4743fbcc27de067fcf79a261046 /drivers/clk/sunxi-ng/ccu_mux.h
parentdt-bindings: clock: sunxi-ccu: Add compatible string for A83T CCU (diff)
downloadlinux-dev-13e0dde8b2ed043aa3e65437342d501715d975c1.tar.xz
linux-dev-13e0dde8b2ed043aa3e65437342d501715d975c1.zip
clk: sunxi-ng: Support multiple variable pre-dividers
On the A83T, the AHB1 clock has a shared pre-divider on the two PLL-PERIPH clock parents. To support such instances of shared pre-dividers, this patch extends the mux clock type to support multiple variable pre-dividers. As the pre-dividers are only used to calculate the rate, but do not participate in the factorization process, this is fairly straightforward. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu_mux.h')
-rw-r--r--drivers/clk/sunxi-ng/ccu_mux.h13
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/clk/sunxi-ng/ccu_mux.h b/drivers/clk/sunxi-ng/ccu_mux.h
index dba12c76cf54..f20c0bd62a47 100644
--- a/drivers/clk/sunxi-ng/ccu_mux.h
+++ b/drivers/clk/sunxi-ng/ccu_mux.h
@@ -10,6 +10,12 @@ struct ccu_mux_fixed_prediv {
u16 div;
};
+struct ccu_mux_var_prediv {
+ u8 index;
+ u8 shift;
+ u8 width;
+};
+
struct ccu_mux_internal {
u8 shift;
u8 width;
@@ -18,11 +24,8 @@ struct ccu_mux_internal {
const struct ccu_mux_fixed_prediv *fixed_predivs;
u8 n_predivs;
- struct {
- u8 index;
- u8 shift;
- u8 width;
- } variable_prediv;
+ const struct ccu_mux_var_prediv *var_predivs;
+ u8 n_var_predivs;
};
#define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table) \