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| author |   Stephen Boyd <sboyd@codeaurora.org> | 2017-08-23 15:30:29 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-23 15:30:29 -0700 |
| commit | 4d64556b3622166216db754211858447079e7c96 (patch) | |
| tree | c23f648bab25550650ad089495652e598ec7db03 /drivers/clk/sunxi-ng | |
| parent | Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into clk-next (diff) | |
| parent | clk: samsung: exynos542x: Enable clock rate propagation up to the EPLL (diff) | |
| download | linux-dev-4d64556b3622166216db754211858447079e7c96.tar.xz linux-dev-4d64556b3622166216db754211858447079e7c96.zip | |
Merge tag 'clk-v4.14-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next
Pull Samsung clk driver updates from Sylwester Nawrocki:
Changes in definitions of audio related clocks for Exynos5420/5422/5800
SoCs: a fix of mau_epll clock definition and changes enabling clock rate
setting propagation on a path from the I2S IP block up the EPLL.
* tag 'clk-v4.14-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
clk: samsung: exynos542x: Enable clock rate propagation up to the EPLL
clk: samsung: Add CLK_SET_RATE_PARENT to some AUDSS CLK CON clocks
clk: samsung: Fix mau_epll clock definition for exynos5422
Diffstat (limited to 'drivers/clk/sunxi-ng')
0 files changed, 0 insertions, 0 deletions