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| author |   Yong Deng <iemdey@gmail.com> | 2017-05-05 18:31:57 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-05-14 08:27:17 +0200 |
| commit | 7ffc781ec46ef1e9aedb482f5f04425bd8bb2753 (patch) | |
| tree | 33403990a70560250b4f2d34611898e8c3c83947 /drivers/clk/sunxi-ng | |
| parent | clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset (diff) | |
| download | linux-dev-7ffc781ec46ef1e9aedb482f5f04425bd8bb2753.tar.xz linux-dev-7ffc781ec46ef1e9aedb482f5f04425bd8bb2753.zip | |
clk: sunxi-ng: v3s: Fix usb otg device reset bit
V3S's usb otg device reset bit should be 24, not 23.
Cc: stable@vger.kernel.org
Signed-off-by: Yong Deng <iemdey@gmail.com>
Reviewed-By: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi-ng')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c index e58706b40ae9..6297add857b5 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c @@ -537,7 +537,7 @@ static struct ccu_reset_map sun8i_v3s_ccu_resets[] = { [RST_BUS_EMAC] = { 0x2c0, BIT(17) }, [RST_BUS_HSTIMER] = { 0x2c0, BIT(19) }, [RST_BUS_SPI0] = { 0x2c0, BIT(20) }, - [RST_BUS_OTG] = { 0x2c0, BIT(23) }, + [RST_BUS_OTG] = { 0x2c0, BIT(24) }, [RST_BUS_EHCI0] = { 0x2c0, BIT(26) }, [RST_BUS_OHCI0] = { 0x2c0, BIT(29) }, |