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author | Ondrej Jirman <megous@megous.com> | 2019-06-04 17:40:36 +0200 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-06-05 13:49:05 +0200 |
commit | f167675486c37b88620d344fbb12d06e34f11d47 (patch) | |
tree | b9ddbcba7e5fe4c03d3520be48105f4381dc9abd /drivers/clk/sunxi-ng | |
parent | clk-sunxi: fix a missing-check bug in sunxi_divs_clk_setup() (diff) | |
download | linux-dev-f167675486c37b88620d344fbb12d06e34f11d47.tar.xz linux-dev-f167675486c37b88620d344fbb12d06e34f11d47.zip |
clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register
The current code defines W1 clock gate to be at 0x1cc, overlaying it
with the IR gate.
Clock gate for r-apb1-w1 is at 0x1ec. This fixes issues with IR receiver
causing interrupt floods on H6 (because interrupt flags can't be cleared,
due to IR module's bus being disabled).
Fixes: b7c7b05065aa77ae ("clk: sunxi-ng: add support for H6 PRCM CCU")
Signed-off-by: Ondrej Jirman <megous@megous.com>
Acked-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'drivers/clk/sunxi-ng')
-rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c index 27554eaf6929..8d05d4f1f8a1 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c @@ -104,7 +104,7 @@ static SUNXI_CCU_GATE(r_apb2_i2c_clk, "r-apb2-i2c", "r-apb2", static SUNXI_CCU_GATE(r_apb1_ir_clk, "r-apb1-ir", "r-apb1", 0x1cc, BIT(0), 0); static SUNXI_CCU_GATE(r_apb1_w1_clk, "r-apb1-w1", "r-apb1", - 0x1cc, BIT(0), 0); + 0x1ec, BIT(0), 0); /* Information of IR(RX) mod clock is gathered from BSP source code */ static const char * const r_mod0_default_parents[] = { "osc32k", "osc24M" }; |