diff options
| author |   Chen-Yu Tsai <wens@csie.org> | 2014-09-16 18:04:01 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-09-27 09:05:43 +0200 |
| commit | 9c8176bfb67f98ed9a521b624dcb6ab7fa254aa7 (patch) | |
| tree | 52bf5988af67aa1c7423010c09dbccfe9ab40671 /drivers/clk/sunxi/Makefile | |
| parent | clk: sunxi: mod0: Introduce MMC proper phase handling (diff) | |
| download | linux-dev-9c8176bfb67f98ed9a521b624dcb6ab7fa254aa7.tar.xz linux-dev-9c8176bfb67f98ed9a521b624dcb6ab7fa254aa7.zip | |
clk: sunxi: Add sun8i MBUS clock support
The MBUS clock on sun8i is slightly different from the old mod0 clocks.
The divider is 3 bits wider, while also needing a divider table for the
higher 4 values, which all set the same divider.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi/Makefile')
| -rw-r--r-- | drivers/clk/sunxi/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 833f086d4a52..7ddc2b553846 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -6,6 +6,7 @@ obj-y += clk-sunxi.o clk-factors.o obj-y += clk-a10-hosc.o obj-y += clk-a20-gmac.o obj-y += clk-mod0.o +obj-y += clk-sun8i-mbus.o obj-$(CONFIG_MFD_SUN6I_PRCM) += \ clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \ |