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| author |   Dmitry Osipenko <digetx@gmail.com> | 2017-10-04 02:02:38 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2017-11-01 15:00:04 +0100 |
| commit | 899f8095e66c562888ff617686e46019b758611b (patch) | |
| tree | c421ea3751b4bfcaff70a96f7d733b6e890fc672 /drivers/clk/tegra/clk-tegra20.c | |
| parent | clk: tegra: Mark APB clock as critical (diff) | |
| download | linux-dev-899f8095e66c562888ff617686e46019b758611b.tar.xz linux-dev-899f8095e66c562888ff617686e46019b758611b.zip | |
clk: tegra: Add AHB DMA clock entry
AHB DMA engine presents on Tegra20/30. Add missing clock entries, so that
driver for the AHB DMA controller could be implemented.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra20.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra20.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 2b839cb24436..02b7ab292e97 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -522,6 +522,7 @@ static struct tegra_devclk devclks[] __initdata = { }; static struct tegra_clk tegra20_clks[tegra_clk_max] __initdata = { + [tegra_clk_ahbdma] = { .dt_id = TEGRA20_CLK_AHBDMA, .present = true }, [tegra_clk_spdif_out] = { .dt_id = TEGRA20_CLK_SPDIF_OUT, .present = true }, [tegra_clk_spdif_in] = { .dt_id = TEGRA20_CLK_SPDIF_IN, .present = true }, [tegra_clk_sdmmc1] = { .dt_id = TEGRA20_CLK_SDMMC1, .present = true }, |