diff options
| author |   Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2018-03-30 18:44:14 +0900 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2018-04-05 15:03:51 -0700 |
| commit | 6f1aa4ef3f78cc0b42aa1b4c61e356523d88e680 (patch) | |
| tree | 1eb7304e5d72c615cda2d3f61a73d2e062e72544 /drivers/clk/uniphier | |
| parent | clk: uniphier: add SATA clock control support (diff) | |
| download | linux-dev-6f1aa4ef3f78cc0b42aa1b4c61e356523d88e680.tar.xz linux-dev-6f1aa4ef3f78cc0b42aa1b4c61e356523d88e680.zip | |
clk: uniphier: add additional ethernet clock lines for Pro4
Pro4 SoC has clock lines for Giga-bit feature and ethernet phy,
and these are mandatory to activate the ethernet controller. This adds
support for the clock lines.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/uniphier')
| -rw-r--r-- | drivers/clk/uniphier/clk-uniphier-sys.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 7d66dfb34af7..ebc78ab2df05 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -102,13 +102,16 @@ const struct uniphier_clk_data uniphier_pro4_sys_clk_data[] = { UNIPHIER_CLK_FACTOR("upll", -1, "ref", 288, 25), /* 288 MHz */ UNIPHIER_CLK_FACTOR("a2pll", -1, "upll", 256, 125), /* 589.824 MHz */ UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 270, 25), /* 270 MHz */ + UNIPHIER_CLK_FACTOR("gpll", -1, "ref", 10, 1), /* 250 MHz */ UNIPHIER_CLK_FACTOR("uart", 0, "a2pll", 1, 8), UNIPHIER_CLK_FACTOR("i2c", 1, "spll", 1, 32), UNIPHIER_LD4_SYS_CLK_NAND(2), UNIPHIER_LD4_SYS_CLK_SD, UNIPHIER_CLK_FACTOR("usb2", -1, "upll", 1, 12), UNIPHIER_PRO4_SYS_CLK_ETHER(6), + UNIPHIER_CLK_GATE("ether-gb", 7, "gpll", 0x2104, 5), UNIPHIER_LD4_SYS_CLK_STDMAC(8), /* HSC, MIO, RLE */ + UNIPHIER_CLK_GATE("ether-phy", 10, "ref", 0x2260, 0), UNIPHIER_PRO4_SYS_CLK_GIO(12), /* Ether, SATA, USB3 */ UNIPHIER_PRO4_SYS_CLK_USB3(14, 0), UNIPHIER_PRO4_SYS_CLK_USB3(15, 1), |