diff options
| author |   Andrew Lunn <andrew@lunn.ch> | 2013-02-05 22:52:51 +0100 |
|---|---|---|
| committer |   Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2013-02-09 12:56:08 +0100 |
| commit | 2a4bd9f0db24ba14c8b38777d77add2682233c79 (patch) | |
| tree | df5c84538f118e63ff93e13456702086e58708bb /drivers/clk | |
| parent | cpufreq/x86: Add P-state driver for sandy bridge. (diff) | |
| download | linux-dev-2a4bd9f0db24ba14c8b38777d77add2682233c79.tar.xz linux-dev-2a4bd9f0db24ba14c8b38777d77add2682233c79.zip | |
cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCs
The Marvell Kirkwood SoCs have simple cpufreq support in hardware. The
CPU can either use the a high speed cpu clock, or the slower DDR
clock. Add a driver to swap between these two clock sources.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/mvebu/clk-gating-ctrl.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/mvebu/clk-gating-ctrl.c b/drivers/clk/mvebu/clk-gating-ctrl.c index 8fa5408b6c7d..ebf141d4374b 100644 --- a/drivers/clk/mvebu/clk-gating-ctrl.c +++ b/drivers/clk/mvebu/clk-gating-ctrl.c @@ -193,6 +193,7 @@ static const struct mvebu_soc_descr __initconst kirkwood_gating_descr[] = { { "runit", NULL, 7 }, { "xor0", NULL, 8 }, { "audio", NULL, 9 }, + { "powersave", "cpuclk", 11 }, { "sata0", NULL, 14 }, { "sata1", NULL, 15 }, { "xor1", NULL, 16 }, |