diff options
| author |   Chen-Yu Tsai <wens@csie.org> | 2016-09-15 14:57:40 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@codeaurora.org> | 2016-09-16 16:04:02 -0700 |
| commit | 5254223a1216f120a84153dac1d0fde4da999a55 (patch) | |
| tree | 72320e7bd9f92292efdb08bce80f4ed3b0e13905 /drivers/clk | |
| parent | clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLs (diff) | |
| download | linux-dev-5254223a1216f120a84153dac1d0fde4da999a55.tar.xz linux-dev-5254223a1216f120a84153dac1d0fde4da999a55.zip | |
clk: sunxi-ng: sun6i-a31: Fix register offset for mipi-csi clk
The register offset for the mipi-csi clk is off by 4, a copy paste
error from the mipi-dsi clk.
Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun6i-a31.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c index ff0d621495fd..79596463e0d9 100644 --- a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c +++ b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c @@ -633,7 +633,7 @@ static SUNXI_CCU_M_WITH_MUX_GATE(mipi_dsi_dphy_clk, "mipi-dsi-dphy", lcd_ch1_parents, 0x168, 0, 3, 8, 2, BIT(15), CLK_SET_RATE_PARENT); static SUNXI_CCU_M_WITH_MUX_GATE(mipi_csi_dphy_clk, "mipi-csi-dphy", - lcd_ch1_parents, 0x168, 0, 3, 8, 2, + lcd_ch1_parents, 0x16c, 0, 3, 8, 2, BIT(15), 0); static SUNXI_CCU_M_WITH_MUX_GATE(iep_drc0_clk, "iep-drc0", de_parents, |