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authorStephen Boyd <sboyd@codeaurora.org>2018-01-26 16:41:39 -0800
committerStephen Boyd <sboyd@codeaurora.org>2018-01-26 16:41:39 -0800
commit74b48999b1c80f42ad0477341aac7249d2641b04 (patch)
tree9cf796b7c540e31be7f377690c683eaeef47a63c /drivers/clk
parentMerge branch '4.15-rc1-clkctrl-driver' of https://github.com/t-kristo/linux-pm into clk-next (diff)
parentclk: qcom: add read-only alpha pll post divider operations (diff)
parentclk: check ops pointer on clock register (diff)
parentclk: fix set_rate_range when current rate is out of range (diff)
parentMerge tag 'omap-for-v4.16/clk-omap3-legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into clk-omap (diff)
downloadlinux-dev-74b48999b1c80f42ad0477341aac7249d2641b04.tar.xz
linux-dev-74b48999b1c80f42ad0477341aac7249d2641b04.zip
Merge branches 'clk-qcom-alpha-pll', 'clk-check-ops-ptr', 'clk-protect-rate' and 'clk-omap' into clk-next
* clk-qcom-alpha-pll: clk: qcom: add read-only alpha pll post divider operations clk: qcom: support for 2 bit PLL post divider clk: qcom: support Brammo type Alpha PLL clk: qcom: support Huayra type Alpha PLL clk: qcom: support for dynamic updating the PLL clk: qcom: support for alpha mode configuration clk: qcom: flag for 64 bit CONFIG_CTL clk: qcom: fix 16 bit alpha support calculation clk: qcom: support for alpha pll properties * clk-check-ops-ptr: clk: check ops pointer on clock register * clk-protect-rate: clk: fix set_rate_range when current rate is out of range clk: add clk_rate_exclusive api clk: cosmetic changes to clk_summary debugfs entry clk: add clock protection mechanism to clk core clk: use round rate to bail out early in set_rate clk: rework calls to round and determine rate callbacks clk: add clk_core_set_phase_nolock function clk: take the prepare lock out of clk_core_set_parent clk: fix incorrect usage of ENOSYS * clk-omap: clk: ti: Drop legacy clk-3xxx-legacy code