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authorTaniya Das <tdas@codeaurora.org>2020-02-11 17:43:55 +0530
committerStephen Boyd <sboyd@kernel.org>2020-02-12 15:02:44 -0800
commit8de427d52da30d3bad06d416e486a6b1bd0f3850 (patch)
treeb6f6518966dac34c8ce628dd3f7f4ef407c25351 /drivers/clk
parentof: clk: Make of_clk_get_parent_{count,name}() parameter const (diff)
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clk: qcom: videocc: Update the clock flag for video_cc_vcodec0_core_clk
The clock disable signal for video_cc_vcodec0_core_clk is tied to vcodec0_gdsc which is supported in the HW control mode. Thus turning off the clock would be taken care automatically when the GDSC turns OFF by hardware and clock driver does not require to poll on the CLK_OFF bit. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1581423235-21341-1-git-send-email-tdas@codeaurora.org Fixes: 253dc75a0bb8 ("clk: qcom: Add video clock controller driver for SC7180") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/qcom/videocc-sc7180.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c
index c363c3cc544e..276e5ecd4840 100644
--- a/drivers/clk/qcom/videocc-sc7180.c
+++ b/drivers/clk/qcom/videocc-sc7180.c
@@ -97,7 +97,7 @@ static struct clk_branch video_cc_vcodec0_axi_clk = {
static struct clk_branch video_cc_vcodec0_core_clk = {
.halt_reg = 0x890,
- .halt_check = BRANCH_HALT,
+ .halt_check = BRANCH_HALT_VOTED,
.clkr = {
.enable_reg = 0x890,
.enable_mask = BIT(0),