diff options
| author |   Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-10-11 14:27:12 +0300 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2021-10-26 18:27:42 -0700 |
| commit | c2910c00fee4cbb7b222d6e02846adef9ae4135a (patch) | |
| tree | 5f483a1072076e2fb3e54f999415fd261798b783 /drivers/clk | |
| parent | clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL (diff) | |
| download | linux-dev-c2910c00fee4cbb7b222d6e02846adef9ae4135a.tar.xz linux-dev-c2910c00fee4cbb7b222d6e02846adef9ae4135a.zip | |
clk: at91: clk-master: check if div or pres is zero
Check if div or pres is zero before using it as argument for ffs().
In case div is zero ffs() will return 0 and thus substracting from
zero will lead to invalid values to be setup in registers.
Fixes: 7a110b9107ed8 ("clk: at91: clk-master: re-factor master clock")
Fixes: 75c88143f3b87 ("clk: at91: clk-master: add master clock support for SAMA7G5")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20211011112719.3951784-9-claudiu.beznea@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/at91/clk-master.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index 9a2c8e64cacf..2093e13b5068 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -344,7 +344,7 @@ static int clk_master_pres_set_rate(struct clk_hw *hw, unsigned long rate, else if (pres == 3) pres = MASTER_PRES_MAX; - else + else if (pres) pres = ffs(pres) - 1; spin_lock_irqsave(master->lock, flags); @@ -757,7 +757,7 @@ static int clk_sama7g5_master_set_rate(struct clk_hw *hw, unsigned long rate, if (div == 3) div = MASTER_PRES_MAX; - else + else if (div) div = ffs(div) - 1; spin_lock_irqsave(master->lock, flags); |