diff options
| author |   Miquel Raynal <miquel.raynal@bootlin.com> | 2019-08-05 12:03:07 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2019-09-17 22:15:41 -0700 |
| commit | cd016cb01835e0b9f62fb675b336fbded912dcb6 (patch) | |
| tree | e6e5bc13bc02fcd10e0c568d95de82bcf6d1a482 /drivers/clk | |
| parent | clk: mvebu: ap80x-cpu: add AP807 CPU clock support (diff) | |
| download | linux-dev-cd016cb01835e0b9f62fb675b336fbded912dcb6.tar.xz linux-dev-cd016cb01835e0b9f62fb675b336fbded912dcb6.zip | |
clk: mvebu: ap806: be more explicit on what SaR is
"SaR" means Sample at Reset. DIP switches can be changed on the board,
their states at reset time is available through a register read.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lkml.kernel.org/r/20190805100310.29048-6-miquel.raynal@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/mvebu/ap806-system-controller.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/mvebu/ap806-system-controller.c b/drivers/clk/mvebu/ap806-system-controller.c index 73ba8fd7860f..2cf874f01394 100644 --- a/drivers/clk/mvebu/ap806-system-controller.c +++ b/drivers/clk/mvebu/ap806-system-controller.c @@ -89,7 +89,7 @@ static int ap806_syscon_common_probe(struct platform_device *pdev, cpuclk_freq = 600; break; default: - dev_err(dev, "invalid SAR value\n"); + dev_err(dev, "invalid Sample at Reset value\n"); return -EINVAL; } |