Merge tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

Pull asm-generic updates from Arnd Bergmann:
 "The asm-generic tree contains three separate changes for linux-5.19:

   - The h8300 architecture is retired after it has been effectively
     unmaintained for a number of years. This is the last architecture
     we supported that has no MMU implementation, but there are still a
     few architectures (arm, m68k, riscv, sh and xtensa) that support
     CPUs with and without an MMU.

   - A series to add a generic ticket spinlock that can be shared by
     most architectures with a working cmpxchg or ll/sc type atomic,
     including the conversion of riscv, csky and openrisc. This series
     is also a prerequisite for the loongarch64 architecture port that
     will come as a separate pull request.

   - A cleanup of some exported uapi header files to ensure they can be
     included from user space without relying on other kernel headers"

* tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
  h8300: remove stale bindings and symlink
  sparc: add asm/stat.h to UAPI compile-test coverage
  powerpc: add asm/stat.h to UAPI compile-test coverage
  mips: add asm/stat.h to UAPI compile-test coverage
  riscv: add linux/bpf_perf_event.h to UAPI compile-test coverage
  kbuild: prevent exported headers from including <stdlib.h>, <stdbool.h>
  agpgart.h: do not include <stdlib.h> from exported header
  csky: Move to generic ticket-spinlock
  RISC-V: Move to queued RW locks
  RISC-V: Move to generic spinlocks
  openrisc: Move to ticket-spinlock
  asm-generic: qrwlock: Document the spinlock fairness requirements
  asm-generic: qspinlock: Indicate the use of mixed-size atomics
  asm-generic: ticket-lock: New generic ticket-based spinlock
  remove the h8300 architecture

5 files changed, 0 insertions, 584 deletions

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 06866bfa1826..fe3f05dfafd9 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -567,26 +567,6 @@ config CLKSRC_PXA
 	  This enables OST0 support available on PXA and SA-11x0
 	  platforms.
 
-config H8300_TMR8
-	bool "Clockevent timer for the H8300 platform" if COMPILE_TEST
-	depends on HAS_IOMEM
-	help
-	  This enables the 8 bits timer for the H8300 platform.
-
-config H8300_TMR16
-	bool "Clockevent timer for the H83069 platform" if COMPILE_TEST
-	depends on HAS_IOMEM
-	help
-	  This enables the 16 bits timer for the H8300 platform with the
-	  H83069 CPU.
-
-config H8300_TPU
-	bool "Clocksource for the H8300 platform" if COMPILE_TEST
-	depends on HAS_IOMEM
-	help
-	  This enables the clocksource for the H8300 platform with the
-	  H8S2678 CPU.
-
 config CLKSRC_IMX_GPT
 	bool "Clocksource using i.MX GPT" if COMPILE_TEST
 	depends on (ARM || ARM64) && HAVE_CLK
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index b839beb6ea53..833cfb7a96c1 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -73,9 +73,6 @@ obj-$(CONFIG_CLKSRC_IMX_GPT)		+= timer-imx-gpt.o
 obj-$(CONFIG_CLKSRC_IMX_TPM)		+= timer-imx-tpm.o
 obj-$(CONFIG_TIMER_IMX_SYS_CTR)		+= timer-imx-sysctr.o
 obj-$(CONFIG_ASM9260_TIMER)		+= asm9260_timer.o
-obj-$(CONFIG_H8300_TMR8)		+= h8300_timer8.o
-obj-$(CONFIG_H8300_TMR16)		+= h8300_timer16.o
-obj-$(CONFIG_H8300_TPU)			+= h8300_tpu.o
 obj-$(CONFIG_INGENIC_OST)		+= ingenic-ost.o
 obj-$(CONFIG_INGENIC_SYSOST)	+= ingenic-sysost.o
 obj-$(CONFIG_INGENIC_TIMER)		+= ingenic-timer.o
diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
deleted file mode 100644
index 86ca91451b2e..000000000000
--- a/drivers/clocksource/h8300_timer16.c
+++ /dev/null
@@ -1,192 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- *  H8/300 16bit Timer driver
- *
- *  Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
- */
-
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/clocksource.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-
-#define TSTR	0
-#define TISRC	6
-
-#define TCR	0
-#define TCNT	2
-
-#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a))
-#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a))
-
-struct timer16_priv {
-	struct clocksource cs;
-	unsigned long total_cycles;
-	void __iomem *mapbase;
-	void __iomem *mapcommon;
-	unsigned short cs_enabled;
-	unsigned char enb;
-	unsigned char ovf;
-	unsigned char ovie;
-};
-
-static unsigned long timer16_get_counter(struct timer16_priv *p)
-{
-	unsigned short v1, v2, v3;
-	unsigned char  o1, o2;
-
-	o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
-
-	/* Make sure the timer value is stable. Stolen from acpi_pm.c */
-	do {
-		o2 = o1;
-		v1 = ioread16be(p->mapbase + TCNT);
-		v2 = ioread16be(p->mapbase + TCNT);
-		v3 = ioread16be(p->mapbase + TCNT);
-		o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
-	} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
-			  || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
-
-	if (likely(!o1))
-		return v2;
-	else
-		return v2 + 0x10000;
-}
-
-
-static irqreturn_t timer16_interrupt(int irq, void *dev_id)
-{
-	struct timer16_priv *p = (struct timer16_priv *)dev_id;
-
-	bclr(p->ovf, p->mapcommon + TISRC);
-	p->total_cycles += 0x10000;
-
-	return IRQ_HANDLED;
-}
-
-static inline struct timer16_priv *cs_to_priv(struct clocksource *cs)
-{
-	return container_of(cs, struct timer16_priv, cs);
-}
-
-static u64 timer16_clocksource_read(struct clocksource *cs)
-{
-	struct timer16_priv *p = cs_to_priv(cs);
-	unsigned long raw, value;
-
-	value = p->total_cycles;
-	raw = timer16_get_counter(p);
-
-	return value + raw;
-}
-
-static int timer16_enable(struct clocksource *cs)
-{
-	struct timer16_priv *p = cs_to_priv(cs);
-
-	WARN_ON(p->cs_enabled);
-
-	p->total_cycles = 0;
-	iowrite16be(0x0000, p->mapbase + TCNT);
-	iowrite8(0x83, p->mapbase + TCR);
-	bset(p->ovie, p->mapcommon + TISRC);
-	bset(p->enb, p->mapcommon + TSTR);
-
-	p->cs_enabled = true;
-	return 0;
-}
-
-static void timer16_disable(struct clocksource *cs)
-{
-	struct timer16_priv *p = cs_to_priv(cs);
-
-	WARN_ON(!p->cs_enabled);
-
-	bclr(p->ovie, p->mapcommon + TISRC);
-	bclr(p->enb, p->mapcommon + TSTR);
-
-	p->cs_enabled = false;
-}
-
-static struct timer16_priv timer16_priv = {
-	.cs = {
-		.name = "h8300_16timer",
-		.rating = 200,
-		.read = timer16_clocksource_read,
-		.enable = timer16_enable,
-		.disable = timer16_disable,
-		.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8),
-		.flags = CLOCK_SOURCE_IS_CONTINUOUS,
-	},
-};
-
-#define REG_CH   0
-#define REG_COMM 1
-
-static int __init h8300_16timer_init(struct device_node *node)
-{
-	void __iomem *base[2];
-	int ret, irq;
-	unsigned int ch;
-	struct clk *clk;
-
-	clk = of_clk_get(node, 0);
-	if (IS_ERR(clk)) {
-		pr_err("failed to get clock for clocksource\n");
-		return PTR_ERR(clk);
-	}
-
-	ret = -ENXIO;
-	base[REG_CH] = of_iomap(node, 0);
-	if (!base[REG_CH]) {
-		pr_err("failed to map registers for clocksource\n");
-		goto free_clk;
-	}
-
-	base[REG_COMM] = of_iomap(node, 1);
-	if (!base[REG_COMM]) {
-		pr_err("failed to map registers for clocksource\n");
-		goto unmap_ch;
-	}
-
-	ret = -EINVAL;
-	irq = irq_of_parse_and_map(node, 0);
-	if (!irq) {
-		pr_err("failed to get irq for clockevent\n");
-		goto unmap_comm;
-	}
-
-	of_property_read_u32(node, "renesas,channel", &ch);
-
-	timer16_priv.mapbase = base[REG_CH];
-	timer16_priv.mapcommon = base[REG_COMM];
-	timer16_priv.enb = ch;
-	timer16_priv.ovf = ch;
-	timer16_priv.ovie = 4 + ch;
-
-	ret = request_irq(irq, timer16_interrupt,
-			  IRQF_TIMER, timer16_priv.cs.name, &timer16_priv);
-	if (ret < 0) {
-		pr_err("failed to request irq %d of clocksource\n", irq);
-		goto unmap_comm;
-	}
-
-	clocksource_register_hz(&timer16_priv.cs,
-				clk_get_rate(clk) / 8);
-	return 0;
-
-unmap_comm:
-	iounmap(base[REG_COMM]);
-unmap_ch:
-	iounmap(base[REG_CH]);
-free_clk:
-	clk_put(clk);
-	return ret;
-}
-
-TIMER_OF_DECLARE(h8300_16bit, "renesas,16bit-timer",
-			   h8300_16timer_init);
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
deleted file mode 100644
index 47114c2a7cb5..000000000000
--- a/drivers/clocksource/h8300_timer8.c
+++ /dev/null
@@ -1,211 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- *  linux/arch/h8300/kernel/cpu/timer/timer8.c
- *
- *  Yoshinori Sato <ysato@users.sourcefoge.jp>
- *
- *  8bit Timer driver
- *
- */
-
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/clockchips.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-
-#define _8TCR	0
-#define _8TCSR	2
-#define TCORA	4
-#define TCORB	6
-#define _8TCNT	8
-
-#define CMIEA	6
-#define CMFA	6
-
-#define FLAG_STARTED (1 << 3)
-
-#define SCALE 64
-
-#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a))
-#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a))
-
-struct timer8_priv {
-	struct clock_event_device ced;
-	void __iomem *mapbase;
-	unsigned long flags;
-	unsigned int rate;
-};
-
-static irqreturn_t timer8_interrupt(int irq, void *dev_id)
-{
-	struct timer8_priv *p = dev_id;
-
-	if (clockevent_state_oneshot(&p->ced))
-		iowrite16be(0x0000, p->mapbase + _8TCR);
-
-	p->ced.event_handler(&p->ced);
-
-	bclr(CMFA, p->mapbase + _8TCSR);
-
-	return IRQ_HANDLED;
-}
-
-static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
-{
-	if (delta >= 0x10000)
-		pr_warn("delta out of range\n");
-	bclr(CMIEA, p->mapbase + _8TCR);
-	iowrite16be(delta, p->mapbase + TCORA);
-	iowrite16be(0x0000, p->mapbase + _8TCNT);
-	bclr(CMFA, p->mapbase + _8TCSR);
-	bset(CMIEA, p->mapbase + _8TCR);
-}
-
-static int timer8_enable(struct timer8_priv *p)
-{
-	iowrite16be(0xffff, p->mapbase + TCORA);
-	iowrite16be(0x0000, p->mapbase + _8TCNT);
-	iowrite16be(0x0c02, p->mapbase + _8TCR);
-
-	return 0;
-}
-
-static int timer8_start(struct timer8_priv *p)
-{
-	int ret;
-
-	if ((p->flags & FLAG_STARTED))
-		return 0;
-
-	ret = timer8_enable(p);
-	if (!ret)
-		p->flags |= FLAG_STARTED;
-
-	return ret;
-}
-
-static void timer8_stop(struct timer8_priv *p)
-{
-	iowrite16be(0x0000, p->mapbase + _8TCR);
-}
-
-static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
-{
-	return container_of(ced, struct timer8_priv, ced);
-}
-
-static void timer8_clock_event_start(struct timer8_priv *p, unsigned long delta)
-{
-	timer8_start(p);
-	timer8_set_next(p, delta);
-}
-
-static int timer8_clock_event_shutdown(struct clock_event_device *ced)
-{
-	timer8_stop(ced_to_priv(ced));
-	return 0;
-}
-
-static int timer8_clock_event_periodic(struct clock_event_device *ced)
-{
-	struct timer8_priv *p = ced_to_priv(ced);
-
-	pr_info("%s: used for periodic clock events\n", ced->name);
-	timer8_stop(p);
-	timer8_clock_event_start(p, (p->rate + HZ/2) / HZ);
-
-	return 0;
-}
-
-static int timer8_clock_event_oneshot(struct clock_event_device *ced)
-{
-	struct timer8_priv *p = ced_to_priv(ced);
-
-	pr_info("%s: used for oneshot clock events\n", ced->name);
-	timer8_stop(p);
-	timer8_clock_event_start(p, 0x10000);
-
-	return 0;
-}
-
-static int timer8_clock_event_next(unsigned long delta,
-				   struct clock_event_device *ced)
-{
-	struct timer8_priv *p = ced_to_priv(ced);
-
-	BUG_ON(!clockevent_state_oneshot(ced));
-	timer8_set_next(p, delta - 1);
-
-	return 0;
-}
-
-static struct timer8_priv timer8_priv = {
-	.ced = {
-		.name = "h8300_8timer",
-		.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-		.rating = 200,
-		.set_next_event = timer8_clock_event_next,
-		.set_state_shutdown = timer8_clock_event_shutdown,
-		.set_state_periodic = timer8_clock_event_periodic,
-		.set_state_oneshot = timer8_clock_event_oneshot,
-	},
-};
-
-static int __init h8300_8timer_init(struct device_node *node)
-{
-	void __iomem *base;
-	int irq, ret;
-	struct clk *clk;
-
-	clk = of_clk_get(node, 0);
-	if (IS_ERR(clk)) {
-		pr_err("failed to get clock for clockevent\n");
-		return PTR_ERR(clk);
-	}
-
-	ret = -ENXIO;
-	base = of_iomap(node, 0);
-	if (!base) {
-		pr_err("failed to map registers for clockevent\n");
-		goto free_clk;
-	}
-
-	ret = -EINVAL;
-	irq = irq_of_parse_and_map(node, 0);
-	if (!irq) {
-		pr_err("failed to get irq for clockevent\n");
-		goto unmap_reg;
-	}
-
-	timer8_priv.mapbase = base;
-
-	timer8_priv.rate = clk_get_rate(clk) / SCALE;
-	if (!timer8_priv.rate) {
-		pr_err("Failed to get rate for the clocksource\n");
-		goto unmap_reg;
-	}
-
-	if (request_irq(irq, timer8_interrupt, IRQF_TIMER,
-			timer8_priv.ced.name, &timer8_priv) < 0) {
-		pr_err("failed to request irq %d for clockevent\n", irq);
-		goto unmap_reg;
-	}
-
-	clockevents_config_and_register(&timer8_priv.ced,
-					timer8_priv.rate, 1, 0x0000ffff);
-
-	return 0;
-unmap_reg:
-	iounmap(base);
-free_clk:
-	clk_put(clk);
-	return ret;
-}
-
-TIMER_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c
deleted file mode 100644
index 17d4ab0f6ad1..000000000000
--- a/drivers/clocksource/h8300_tpu.c
+++ /dev/null
@@ -1,158 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- *  H8S TPU Driver
- *
- *  Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
- *
- */
-
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clocksource.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-
-#define TCR	0x0
-#define TSR	0x5
-#define TCNT	0x6
-
-#define TCFV	0x10
-
-struct tpu_priv {
-	struct clocksource cs;
-	void __iomem *mapbase1;
-	void __iomem *mapbase2;
-	raw_spinlock_t lock;
-	unsigned int cs_enabled;
-};
-
-static inline unsigned long read_tcnt32(struct tpu_priv *p)
-{
-	unsigned long tcnt;
-
-	tcnt = ioread16be(p->mapbase1 + TCNT) << 16;
-	tcnt |= ioread16be(p->mapbase2 + TCNT);
-	return tcnt;
-}
-
-static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
-{
-	unsigned long v1, v2, v3;
-	int o1, o2;
-
-	o1 = ioread8(p->mapbase1 + TSR) & TCFV;
-
-	/* Make sure the timer value is stable. Stolen from acpi_pm.c */
-	do {
-		o2 = o1;
-		v1 = read_tcnt32(p);
-		v2 = read_tcnt32(p);
-		v3 = read_tcnt32(p);
-		o1 = ioread8(p->mapbase1 + TSR) & TCFV;
-	} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
-			  || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
-
-	*val = v2;
-	return o1;
-}
-
-static inline struct tpu_priv *cs_to_priv(struct clocksource *cs)
-{
-	return container_of(cs, struct tpu_priv, cs);
-}
-
-static u64 tpu_clocksource_read(struct clocksource *cs)
-{
-	struct tpu_priv *p = cs_to_priv(cs);
-	unsigned long flags;
-	unsigned long long value;
-
-	raw_spin_lock_irqsave(&p->lock, flags);
-	if (tpu_get_counter(p, &value))
-		value += 0x100000000;
-	raw_spin_unlock_irqrestore(&p->lock, flags);
-
-	return value;
-}
-
-static int tpu_clocksource_enable(struct clocksource *cs)
-{
-	struct tpu_priv *p = cs_to_priv(cs);
-
-	WARN_ON(p->cs_enabled);
-
-	iowrite16be(0, p->mapbase1 + TCNT);
-	iowrite16be(0, p->mapbase2 + TCNT);
-	iowrite8(0x0f, p->mapbase1 + TCR);
-	iowrite8(0x03, p->mapbase2 + TCR);
-
-	p->cs_enabled = true;
-	return 0;
-}
-
-static void tpu_clocksource_disable(struct clocksource *cs)
-{
-	struct tpu_priv *p = cs_to_priv(cs);
-
-	WARN_ON(!p->cs_enabled);
-
-	iowrite8(0, p->mapbase1 + TCR);
-	iowrite8(0, p->mapbase2 + TCR);
-	p->cs_enabled = false;
-}
-
-static struct tpu_priv tpu_priv = {
-	.cs = {
-		.name = "H8S_TPU",
-		.rating = 200,
-		.read = tpu_clocksource_read,
-		.enable = tpu_clocksource_enable,
-		.disable = tpu_clocksource_disable,
-		.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8),
-		.flags = CLOCK_SOURCE_IS_CONTINUOUS,
-	},
-};
-
-#define CH_L 0
-#define CH_H 1
-
-static int __init h8300_tpu_init(struct device_node *node)
-{
-	void __iomem *base[2];
-	struct clk *clk;
-	int ret = -ENXIO;
-
-	clk = of_clk_get(node, 0);
-	if (IS_ERR(clk)) {
-		pr_err("failed to get clock for clocksource\n");
-		return PTR_ERR(clk);
-	}
-
-	base[CH_L] = of_iomap(node, CH_L);
-	if (!base[CH_L]) {
-		pr_err("failed to map registers for clocksource\n");
-		goto free_clk;
-	}
-	base[CH_H] = of_iomap(node, CH_H);
-	if (!base[CH_H]) {
-		pr_err("failed to map registers for clocksource\n");
-		goto unmap_L;
-	}
-
-	tpu_priv.mapbase1 = base[CH_L];
-	tpu_priv.mapbase2 = base[CH_H];
-
-	return clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64);
-
-unmap_L:
-	iounmap(base[CH_H]);
-free_clk:
-	clk_put(clk);
-	return ret;
-}
-
-TIMER_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init);