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authorHarsh Jain <harsh@chelsio.com>2018-03-06 10:37:52 +0530
committerHerbert Xu <herbert@gondor.apana.org.au>2018-03-16 23:35:47 +0800
commit5110e65536f35e854f5d520b913505dbdbe22787 (patch)
treecea75b421f19e1b8cf1593cd77e782e8b30341a8 /drivers/crypto/chelsio/chcr_core.h
parentcrypto: chelsio - Fix iv passed in fallback path for rfc3686 (diff)
downloadlinux-dev-5110e65536f35e854f5d520b913505dbdbe22787.tar.xz
linux-dev-5110e65536f35e854f5d520b913505dbdbe22787.zip
crypto: chelsio -Split Hash requests for large scatter gather list
Send multiple WRs to H/W when No. of entries received in scatter list cannot be sent in single request. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/chelsio/chcr_core.h')
-rw-r--r--drivers/crypto/chelsio/chcr_core.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/crypto/chelsio/chcr_core.h b/drivers/crypto/chelsio/chcr_core.h
index 3c29ee09b8b5..90fbc985da0c 100644
--- a/drivers/crypto/chelsio/chcr_core.h
+++ b/drivers/crypto/chelsio/chcr_core.h
@@ -54,10 +54,14 @@
#define MAC_ERROR_BIT 0
#define CHK_MAC_ERR_BIT(x) (((x) >> MAC_ERROR_BIT) & 1)
#define MAX_SALT 4
-#define WR_MIN_LEN (sizeof(struct chcr_wr) + \
+#define CIP_WR_MIN_LEN (sizeof(struct chcr_wr) + \
sizeof(struct cpl_rx_phys_dsgl) + \
sizeof(struct ulptx_sgl))
+#define HASH_WR_MIN_LEN (sizeof(struct chcr_wr) + \
+ DUMMY_BYTES + \
+ sizeof(struct ulptx_sgl))
+
#define padap(dev) pci_get_drvdata(dev->u_ctx->lldi.pdev)
struct uld_ctx;