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| author |   Weili Qian <qianweili@huawei.com> | 2022-09-09 17:46:56 +0800 |
|---|---|---|
| committer |   Herbert Xu <herbert@gondor.apana.org.au> | 2022-09-16 18:29:44 +0800 |
| commit | 129a9f340172b4f3857260a7a7bb9d7b3496ba50 (patch) | |
| tree | 2a43e8d964a32e93c3210dc1e4d53cdd2998b8c3 /drivers/crypto/hisilicon/sec2/sec_main.c | |
| parent | crypto: hisilicon/qm - get hardware features from hardware registers (diff) | |
| download | linux-dev-129a9f340172b4f3857260a7a7bb9d7b3496ba50.tar.xz linux-dev-129a9f340172b4f3857260a7a7bb9d7b3496ba50.zip | |
crypto: hisilicon/qm - get qp num and depth from hardware registers
Hardware V3 and later versions can obtain qp num and depth supported
by the hardware from registers. To be compatible with later hardware
versions, get qp num and depth from registers instead of fixed marcos.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/sec2/sec_main.c')
| -rw-r--r-- | drivers/crypto/hisilicon/sec2/sec_main.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c index 1ec3b06345fd..ea7f85f72b10 100644 --- a/drivers/crypto/hisilicon/sec2/sec_main.c +++ b/drivers/crypto/hisilicon/sec2/sec_main.c @@ -27,7 +27,6 @@ #define SEC_BD_ERR_CHK_EN3 0xffffbfff #define SEC_SQE_SIZE 128 -#define SEC_SQ_SIZE (SEC_SQE_SIZE * QM_Q_DEPTH) #define SEC_PF_DEF_Q_NUM 256 #define SEC_PF_DEF_Q_BASE 0 #define SEC_CTX_Q_NUM_DEF 2 |