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authorKai Ye <yekai13@huawei.com>2021-05-21 18:02:43 +0800
committerHerbert Xu <herbert@gondor.apana.org.au>2021-05-28 15:11:46 +0800
commitdc11803409fbf8bc5a326ddd9f24cde620b3519d (patch)
treeb33e8f73b66f835f9c61126349173d7bc2ccda6a /drivers/crypto/hisilicon
parentcrypto: qce - Fix inconsistent indenting (diff)
downloadlinux-dev-dc11803409fbf8bc5a326ddd9f24cde620b3519d.tar.xz
linux-dev-dc11803409fbf8bc5a326ddd9f24cde620b3519d.zip
crypto: hisilicon/qm - add dfx log if not use hardware crypto algs
Add print information necessary if not use hardware crypto algs. Signed-off-by: Kai Ye <yekai13@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon')
-rw-r--r--drivers/crypto/hisilicon/qm.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
index 8f7ea504ce80..deb104e2bd24 100644
--- a/drivers/crypto/hisilicon/qm.c
+++ b/drivers/crypto/hisilicon/qm.c
@@ -4252,11 +4252,14 @@ static void hisi_qm_controller_reset(struct work_struct *rst_work)
*/
int hisi_qm_alg_register(struct hisi_qm *qm, struct hisi_qm_list *qm_list)
{
+ struct device *dev = &qm->pdev->dev;
int flag = 0;
int ret = 0;
- /* HW V2 not support both use uacce sva mode and hardware crypto algs */
- if (qm->ver <= QM_HW_V2 && qm->use_sva)
+
+ if (qm->ver <= QM_HW_V2 && qm->use_sva) {
+ dev_info(dev, "HW V2 not both use uacce sva mode and hardware crypto algs.\n");
return 0;
+ }
mutex_lock(&qm_list->lock);
if (list_empty(&qm_list->list))