diff options
| author |   Ofer Heifetz <oferh@marvell.com> | 2018-06-28 17:15:42 +0200 |
|---|---|---|
| committer |   Herbert Xu <herbert@gondor.apana.org.au> | 2018-07-09 00:30:15 +0800 |
| commit | 63b942782f1dd241d19a7584b4b644da0f5338c0 (patch) | |
| tree | b73e5234c2a61a6a1bcfce85c459a05dc54829a8 /drivers/crypto/inside-secure/safexcel.c | |
| parent | crypto: inside-secure - reset CDR and RDR rings on module removal (diff) | |
| download | linux-dev-63b942782f1dd241d19a7584b4b644da0f5338c0.tar.xz linux-dev-63b942782f1dd241d19a7584b4b644da0f5338c0.zip | |
crypto: inside-secure - set tx_max_cmd_queue to 32
The ORO bridge (connected to the EIP197 write channel) does not
generate back pressure towards the EIP197 when its internal FIFO is
full. It assumes that the EIP will not drive more write transactions
than the maximal supported outstanding (32).
Hence tx_max_cmd_queue must be configured to 5 (or less).
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/inside-secure/safexcel.c')
| -rw-r--r-- | drivers/crypto/inside-secure/safexcel.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/crypto/inside-secure/safexcel.c b/drivers/crypto/inside-secure/safexcel.c index 5feb83c6238b..9e5d2bf232eb 100644 --- a/drivers/crypto/inside-secure/safexcel.c +++ b/drivers/crypto/inside-secure/safexcel.c @@ -306,6 +306,10 @@ static int safexcel_hw_init(struct safexcel_crypto_priv *priv) else if (((version >> 16) & 0xffff) == EIP197_HIA_VERSION_LE) val |= (EIP197_MST_CTRL_NO_BYTE_SWAP >> 24); + /* For EIP197 set maximum number of TX commands to 2^5 = 32 */ + if (priv->version == EIP197B || priv->version == EIP197D) + val |= EIP197_MST_CTRL_TX_MAX_CMD(5); + writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL); /* Configure wr/rd cache values */ |