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authorAntoine Ténart <antoine.tenart@free-electrons.com>2017-12-14 15:26:53 +0100
committerHerbert Xu <herbert@gondor.apana.org.au>2017-12-22 20:03:33 +1100
commitdc7e28a3286ed4c4ce79e279c6f8b99f39ab8e68 (patch)
tree913fff5765828c35e9a0ffb416ebe1e3606ed95c /drivers/crypto/inside-secure/safexcel.h
parentcrypto: inside-secure - use threaded IRQs for result handling (diff)
downloadlinux-dev-dc7e28a3286ed4c4ce79e279c6f8b99f39ab8e68.tar.xz
linux-dev-dc7e28a3286ed4c4ce79e279c6f8b99f39ab8e68.zip
crypto: inside-secure - dequeue all requests at once
This patch updates the dequeueing logic to dequeue all requests at once. Since we can have many requests in the queue, the interrupt coalescing is kept so that the ring interrupt fires every EIP197_MAX_BATCH_SZ at most. To allow dequeueing all requests at once while still using reasonable settings for the interrupt coalescing, the result handling function was updated to setup the threshold interrupt when needed (i.e. when more requests than EIP197_MAX_BATCH_SZ are in the queue). When using this capability the ring is marked as busy so that the dequeue function enqueue new requests without setting the threshold interrupt. Suggested-by: Ofer Heifetz <oferh@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/inside-secure/safexcel.h')
-rw-r--r--drivers/crypto/inside-secure/safexcel.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/crypto/inside-secure/safexcel.h b/drivers/crypto/inside-secure/safexcel.h
index fffddefb0d9b..531e3e9d8384 100644
--- a/drivers/crypto/inside-secure/safexcel.h
+++ b/drivers/crypto/inside-secure/safexcel.h
@@ -489,6 +489,14 @@ struct safexcel_crypto_priv {
/* queue */
struct crypto_queue queue;
spinlock_t queue_lock;
+
+ /* Number of requests in the engine that needs the threshold
+ * interrupt to be set up.
+ */
+ int requests_left;
+
+ /* The ring is currently handling at least one request */
+ bool busy;
} ring[EIP197_MAX_RINGS];
};