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| author |   Giovanni Cabiddu <giovanni.cabiddu@intel.com> | 2019-04-29 16:43:18 +0100 |
|---|---|---|
| committer |   Herbert Xu <herbert@gondor.apana.org.au> | 2019-05-23 14:01:02 +0800 |
| commit | 51d33c2f05edeace67e6f7f0603dc7aa4667e9a6 (patch) | |
| tree | 22b7fa688ba3a5c7377bbc162b0699c0ba999ad0 /drivers/crypto/qat | |
| parent | crypto: qat - update iv after encryption or decryption operations (diff) | |
| download | linux-dev-51d33c2f05edeace67e6f7f0603dc7aa4667e9a6.tar.xz linux-dev-51d33c2f05edeace67e6f7f0603dc7aa4667e9a6.zip | |
crypto: qat - fix block size for aes ctr mode
The block size for aes counter mode was improperly set to AES_BLOCK_SIZE.
This sets it to 1 as it is a stream cipher.
This problem was found with by the new extra run-time crypto self test.
Reviewed-by: Conor Mcloughlin <conor.mcloughlin@intel.com>
Tested-by: Sergey Portnoy <sergey.portnoy@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat')
| -rw-r--r-- | drivers/crypto/qat/qat_common/qat_algs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/qat/qat_common/qat_algs.c b/drivers/crypto/qat/qat_common/qat_algs.c index 6be3e7413beb..5ca5cf9f6be5 100644 --- a/drivers/crypto/qat/qat_common/qat_algs.c +++ b/drivers/crypto/qat/qat_common/qat_algs.c @@ -1273,7 +1273,7 @@ static struct crypto_alg qat_algs[] = { { .cra_driver_name = "qat_aes_ctr", .cra_priority = 4001, .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC, - .cra_blocksize = AES_BLOCK_SIZE, + .cra_blocksize = 1, .cra_ctxsize = sizeof(struct qat_alg_ablkcipher_ctx), .cra_alignmask = 0, .cra_type = &crypto_ablkcipher_type, |