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author | 2011-10-24 12:57:57 -0400 | |
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committer | 2011-11-01 16:01:55 +0000 | |
commit | 06c9c2332cc3bffcc184f32ee503dc0a4eb83de0 (patch) | |
tree | b109045b72843ff0c3d0e6f3fba65b97868920cb /drivers/devfreq/devfreq.c | |
parent | drm/radeon/kms: rework texture cache flush in r6xx+ blit code (diff) | |
download | linux-dev-06c9c2332cc3bffcc184f32ee503dc0a4eb83de0.tar.xz linux-dev-06c9c2332cc3bffcc184f32ee503dc0a4eb83de0.zip |
drm/radeon/kms/cayman/blit: specify CP_COHER_CNTL2 with surface_sync
CP_COHER_CNTL2 has to be programmed manually when submitting packets
to the ring directly rather than programmed via an IB.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/devfreq/devfreq.c')
0 files changed, 0 insertions, 0 deletions