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| author |   Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-10-20 19:33:46 -0200 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-11-01 10:01:54 -0200 |
| commit | 3d78c9af78e080db1961fd30ede1720d6e6e5999 (patch) | |
| tree | 97581ef0eecd358abb13988e29c21310c00a0b88 /drivers/edac/Kconfig | |
| parent | edac: Add an experimental new driver to support Sandy Bridge CPU's (diff) | |
| download | linux-dev-3d78c9af78e080db1961fd30ede1720d6e6e5999.tar.xz linux-dev-3d78c9af78e080db1961fd30ede1720d6e6e5999.zip | |
edac: sb_edac: Add it to the building system
Some changes on it were required due to changeset cd90cc84c6bf0, that
changed the glue with the MCE logic.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/Kconfig')
| -rw-r--r-- | drivers/edac/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index d057d6c40208..15e453577213 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -212,6 +212,13 @@ config EDAC_I7300 Support for error detection and correction the Intel Clarksboro MCH (Intel 7300 chipset). +config EDAC_SBRIDGE + tristate "Intel Sandy-Bridge Integrated MC" + depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL + help + Support for error detection and correction the Intel + Sandy Bridge Integrated Memory Controller. + config EDAC_MPC85XX tristate "Freescale MPC83xx / MPC85xx" depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx) |