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authorThor Thayer <tthayer@opensource.altera.com>2016-03-21 11:01:45 -0500
committerBorislav Petkov <bp@suse.de>2016-03-29 10:42:34 +0200
commitff6fd1478c531a40279cf013227279f31ff90b41 (patch)
tree765a59dc03cb9a44d0fbd8a03ebacab4e45d637e /drivers/edac/altera_edac.h
parentEDAC, altera: Add Arria10 L2 Cache ECC handling (diff)
downloadlinux-dev-ff6fd1478c531a40279cf013227279f31ff90b41.tar.xz
linux-dev-ff6fd1478c531a40279cf013227279f31ff90b41.zip
ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be enabled before data is stored in memory otherwise the ECC will fail on reads. Use DT_MACHINE to select Arria10 L2 cache function. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1458576106-24505-9-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac/altera_edac.h')
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